Abstract: According to one embodiment, a semiconductor storage device includes a substrate, a first electric charge holder, and a channel layer. At least a part of the first electric charge holder is curved in a first cross section along a surface of the substrate. The channel layer is inside the first electric charge holder in the first cross section. At least a part of the channel layer is curved in the first cross section. The first electric charge holder has a curvature varying in accordance with a position in the first cross section. The channel layer has a film thickness varying in accordance with the curvature of the first electric charge holder in the first cross section.

Abstract: A semiconductor memory device has a chip shape. A stacked body is formed by alternately stacking, in a first direction, a plurality of first insulating layers and a plurality of first conductive layers each of which functions as a control gate of a memory cell transistor. A first columnar body extends in the first direction in the stacked body and includes a first semiconductor portion. An insulating film is provided at an end portion of the semiconductor memory device. A second columnar body extends in the first direction in the insulating film and includes a second semiconductor portion that is shorter than the first semiconductor portion in the first direction. An impurity concentration of the second semiconductor portion at a bottom portion of the second columnar body is higher than that of the first semiconductor portion at an intersection portion between the first columnar body and the first conductive layer.

Abstract: A semiconductor storage device includes a first stacked body, a second stacked body, an intermediate insulating layer, and a plurality of columnar bodies. The intermediate insulating layer is located between a first stacked body and a second stacked body and has a thickness in the stacking direction larger than that of one insulating layer in the plurality of insulating layers of the first stacked body. The plurality of columnar bodies are provided over the first stacked body and the second stacked body, and each columnar body includes a semiconductor body, a charge storage film provided between at least one of the plurality of conductive layers and the semiconductor body, and a semiconductor film. Each of the plurality of columnar bodies include a first columnar portion formed in the first stacked body, a second columnar portion formed in the intermediate insulating layer, and a third columnar portion formed in the second stacked body.

Abstract: A semiconductor memory device includes a stacked body in which a first insulating layer and a first conductive layer are alternately stacked in a first direction. A columnar body includes a first insulating portion extending in the first direction in the stacked body, a first semiconductor portion provided between the first insulating portion and the stacked body, and a third insulating portion provided between a second insulating portion provided between the first semiconductor portion and the stacked body, and the second insulating portion and the stacked body, and has a first end and a second end opposite to the first end. A second conductive layer is provided on the stacked body and is electrically connected to the first semiconductor portion at the first end of the columnar body.

Abstract: A semiconductor storage device includes: conductive layers arranged in a first direction; a first insulating layer extending in the first direction; a first semiconductor layer between the conductive layers and the first insulating layer; and a gate insulating film between the conductive layers and the first semiconductor layer. The first semiconductor layer includes a first region between a first insulating portion and the first conductive layer, a second region between a second insulating portion and the second conductive layer, and a third region between the first region and the second region. The third region includes a fourth region extending in a second direction, a fifth region between the first region and the fourth region, a sixth region between the second region and the fourth region, and a seventh region between the fifth region and the first region and extending in the first direction.

Abstract: A semiconductor memory device includes a substrate, a layer stack, and a pillar. The layer stack is in a first direction above the substrate. The pillar penetrates the layer stack in the first direction. The layer stack includes a first conductor and a first insulator on an upper surface of the first conductor along the first direction. The pillar includes a second insulator extending along an extending direction of the pillar. The second insulator includes a first part located in a first layer in which the first conductor is located and a second part located in a second layer in which the first insulator is located. The first part includes a portion thicker than the second part. A diameter of the pillar in the first layer is larger than a diameter of the pillar in the second layer.

Abstract: A semiconductor storage device includes a processing circuit provided on a substrate, a plurality of first electrodes connected to the processing circuit, and a plurality of second electrodes connected to the plurality of first electrodes. The semiconductor storage device also includes a memory cell array connected to the plurality of second electrodes. The memory cell array includes a block, and the block includes a string unit. Each string unit includes a plurality of memory cells, and a plurality of column-shaped parts penetrating through at least one stack body that is a stack of a plurality of electrode films between which an insulating film is interposed. The semiconductor storage device includes a slit insulating, for each string unit, a source line electrically connected to a portion of the plurality of memory cells and a source line electrically connected to another portion of the memory cells.

Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a stacked film alternately including first layers and second layers in a first direction, forming a hole extending in the first direction in the stacked film, and forming a first insulator on a side face of the stacked film in the hole. The method further includes removing the first insulator in the hole to expose a first part of the side face of the stacked film at a predetermined height in the first direction of the hole and to expose a side face of the first insulator remaining on a second part of the side face of the stacked film at the predetermined height. The method further includes forming a second insulator on the first part of the side face of the stacked film and the side face of the remaining first insulator in the hole.

Abstract: A semiconductor storage device includes: conductive layers arranged in a first direction; a first insulating layer extending in the first direction; a first semiconductor layer between the conductive layers and the first insulating layer; and a gate insulating film between the conductive layers and the first semiconductor layer. The first semiconductor layer includes a first region between a first insulating portion and the first conductive layer, a second region between a second insulating portion and the second conductive layer, and a third region between the first region and the second region. The third region includes a fourth region extending in a second direction, a fifth region between the first region and the fourth region, a sixth region between the second region and the fourth region, and a seventh region between the fifth region and the first region and extending in the first direction.

Abstract: A semiconductor storage device according to an embodiment includes a stacked body and a pillar. The pillar includes an insulating core, a channel layer, and a memory film. A plurality of gate electrode layers included in the stacked body includes a plurality of first gate electrode layers and one or more second gate electrode layers. The channel layer includes a first portion and a second portion. The first portion is provided between an uppermost first gate electrode layer and the insulating core. The second portion extends from a first height to a second height. A film thickness of the second portion is greater than a film thickness of the first portion.

Abstract: A semiconductor storage device includes a first stacked body, a second stacked body, an intermediate insulating layer, and a plurality of columnar bodies. The intermediate insulating layer is located between a first stacked body and a second stacked body and has a thickness in the stacking direction larger than that of one insulating layer in the plurality of insulating layers of the first stacked body. The plurality of columnar bodies are provided over the first stacked body and the second stacked body, and each columnar body includes a semiconductor body, a charge storage film provided between at least one of the plurality of conductive layers and the semiconductor body, and a semiconductor film. Each of the plurality of columnar bodies include a first columnar portion formed in the first stacked body, a second columnar portion formed in the intermediate insulating layer, and a third columnar portion formed in the second stacked body.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body of first conductor layers and second conductor layers. A pillar including a semiconductor layer extends along through the stacked body in a first direction. A charge storage layer is between the conductor layers and the semiconductor layer. The semiconductor layer includes a first portion extending along the first direction from an uppermost first conductor layer to a lowermost second conductor layer and a second portion above the first portion in the first direction. The second portion has a diameter that decreases with increasing distance along the first direction from the first portion.

Abstract: According to one embodiment, a semiconductor storage device includes a substrate, a first electric charge holder, and a channel layer. At least a part of the first electric charge holder is curved in a first cross section along a surface of the substrate. The channel layer is inside the first electric charge holder in the first cross section. At least a part of the channel layer is curved in the first cross section. The first electric charge holder has a curvature varying in accordance with a position in the first cross section. The channel layer has a film thickness varying in accordance with the curvature of the first electric charge holder in the first cross section.

Abstract: A device includes a first semiconductor layer that includes a first region provided between a first insulating portion and first conductive layers, a second region provided between a second insulating portion and second conductive layers, and a third region provided between the first region and the second region. A first insulating layer includes a thickness (t1) from a surface in the first region to a gate insulating film. The first insulating layer includes a thickness (t2) from a surface in the second region to the gate insulating film. The first insulating layer includes a thickness (t3) from a surface in the third region to the gate insulating film, which is larger than t1-2 nanometers (nm), and larger than t2-2 nm.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body of first conductor layers and second conductor layers. A pillar including a semiconductor layer extends along through the stacked body in a first direction. A charge storage layer is between the conductor layers and the semiconductor layer. The semiconductor layer includes a first portion extending along the first direction from an uppermost first conductor layer to a lowermost second conductor layer and a second portion above the first portion in the first direction. The second portion has a diameter that decreases with increasing distance along the first direction from the first portion.

Abstract: A semiconductor memory device includes a first semiconductor well of a first conductivity type in a memory cell region and a contact region of a substrate, a second semiconductor well of a second conductivity type in the first semiconductor well in the contact region, a plurality of electrode films stacked on the first semiconductor well and spaced from one another in a first direction, the plurality of electrode films extending in a second direction within the memory cell region into the contact region, a first semiconductor pillar extending in the second direction through the plurality of electrode films in the memory cell region, a second semiconductor pillar extending in the second direction through at least one electrode film in the contact region, a charge storage film between the first semiconductor pillar and each electrode film, an insulating film between the second semiconductor pillar and the at least one electrode film.

Abstract: A semiconductor memory device includes a first semiconductor well of a first conductivity type in a memory cell region and a contact region of a substrate, a second semiconductor well of a second conductivity type in the first semiconductor well in the contact region, a plurality of electrode films stacked on the first semiconductor well and spaced from one another in a first direction, the plurality of electrode films extending in a second direction within the memory cell region into the contact region, a first semiconductor pillar extending in the second direction through the plurality of electrode films in the memory cell region, a second semiconductor pillar extending in the second direction through at least one electrode film in the contact region, a charge storage film between the first semiconductor pillar and each electrode film, an insulating film between the second semiconductor pillar and the at least one electrode film.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate; a stacked body including a plurality of electrode layers; a first semiconductor film including a first portion and a second portion; a first insulating film having a lower surface; and a second semiconductor film having a lower surface. The first portion is provided as one body inside the stacked body. The first portion has a first crystal structure different from a crystal structure of the substrate. The second portion is provided between the first portion and the substrate. The second portion contacts the substrate and has a second crystal structure different from the first crystal structure.