Patents by Inventor Yosuke Takagi

Yosuke Takagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5804859
    Abstract: A semiconductor device having an input terminal and an output terminal includes at least one high power device for supplying output current as an output section, and over-current limiting circuits, each including a over-current detection circuit, for limiting the amount of each current flowing through a plurality of bonding wires by which the output terminal is connected to an external terminal, to a current value of a desired amount or less. Thereby, an over-current condition where the current value is over an allowable current value, is avoided and blowing the bonding wire of the device can be prevented.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: September 8, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hitoshi Takahashi, Yosuke Takagi
  • Patent number: 5493148
    Abstract: A semiconductor device includes a resistor network having a plurality of trimming polysilicon resistors. The polysilicon resistors have the same width and different lengths and can be selectively fused according to the value of current which is caused to flow therein. The resultant resistance of the resistor network is changed by selectively fusing the polysilicon resistors. The output characteristic of the semiconductor device can be adjusted by changing the resultant resistance.
    Type: Grant
    Filed: October 2, 1992
    Date of Patent: February 20, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yu Ohata, Koichi Kitahara, Yosuke Takagi
  • Patent number: 5418383
    Abstract: At least one power output element made of an insulated gate semiconductor element, a surge protection element for an input electrode of the power output element, and a circuit element block for controlling the power output element, are formed on the same semiconductor substrate. A predetermined electrode of the power output element and one end of the surge protection element are connected to each other. In this state, first, second, and third electrode wiring layers are connected to an output terminal of the circuit element block, the other end of the surge protection element, and the input electrode of the power output element, respectively, and the first to third electrode wiring layers are formed separately from one another. In order to connect the first to third electrode wiring layers to each other, a fourth electrode wiring layer is formed thereon.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: May 23, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Takagi, Yu Ohata, Koichi Kitahara
  • Patent number: 5200517
    Abstract: A mixture of xylene isomers or a mixture of a xylene isomer(s) and ethylbenzene is brought into contact with at least one specific substituted .alpha.-cyclodextrin to form an inclusion complex(es) of the substituted .alpha.-cyclodextrin with a xylene isomer or ethylbenzene included therein, from which the xylene isomer(s) and/or ethylbenzene is then extracted to isolate, or separate, the same. Inclusion-complexing agents usable in isolation, or separation, of the xylene isomer(s) and/or ethylbenzene are substituted .alpha.-cyclodextrin in the form of .alpha.-cyclodextrin having the hydrogen atom of at least one hydroxyl group thereof substituted with at least one member selected from the group consisting of a glucosyl group, a maltosyl group, maltooligosaccharide residues, a hydroxyethyl group, a hydroxypropyl group, a methyl group, a sulfonic group, alkylenesulfonic groups, and carboxyalkyl groups.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: April 6, 1993
    Assignees: Agency of Industrial Science and Technology, Ensuiko Sugar Refining Co. Ltd., Japan Organo Co. Ltd.
    Inventors: Isamu Uemasu, Yosuke Takagi, Makoto Chiwa
  • Patent number: 5095173
    Abstract: A mixture of xylene isomers or a mixture of a xylene isomer(s) and ethylbenzene is brought into contact with at least one specific substituted .alpha.-cyclodextrin to form an inclusion complex(es) of the substituted .alpha.-cyclodextrin with a xylene isomer or ethylbenzene included therein, from which the xylene isomer(s) and/or ethylbenzene is then extracted to isolate, or separate, the same. Inclusion-complexing agents usable in isolation, or separation, of the xylene isomer(s) and/or ethylbenzene are substitited .alpha.-cyclodextrin in the form of .alpha.-cyclodextrin having the hydrogen atom of at least one hydroxyl group thereof substituted with at least one member selected from the group consisting of a glucosyl group, a maltosyl group, maltooligosaccharide residues, a hydroxyethyl group, a hydroxypropyl group, a methyl group, a sulfonic group, alkylenesulfonic groups, and carboxyalkyl groups.
    Type: Grant
    Filed: September 17, 1990
    Date of Patent: March 10, 1992
    Assignees: Agency of Industrial Science and Technology, Ensuiko Sugar Refining Co., Ltd., Japan Organo Co., Ltd.
    Inventors: Isamu Uemasu, Yosuke Takagi, Makoto Chiwa
  • Patent number: 4879584
    Abstract: A semiconductor device is provided which has a power insulated-gate MOS field effect transistor and a control semiconductor element formed in a common semiconductor substrate. A first area corresponding to a drain region of low resistance in the power MOS field effect transistor is different in resistivity than a second area corresponding to the control semiconductor element. The electrical characteristics of each element integrated in the devices is substantially equal to the same element in discrete form.
    Type: Grant
    Filed: February 10, 1988
    Date of Patent: November 7, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Takagi, Yu Ohata, Koichi Kitahara, Tsuyoshi Kuramoto
  • Patent number: RE34025
    Abstract: A semiconductor device is provided which has a power insulated-gate MOS field effect transistor and a control semiconductor element formed in a common semiconductor substrate. A first area corresponding to a drain region of low resistance in the power MOS field effect transistor is different in resistivity than a second area corresponding to the control semiconductor element. The electrical characteristics of each element integrated in the devices is substantially equal to the same element in discrete form.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: August 11, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Takagi, Yu Ohata, Koichi Kitahara, Tsuyoshi Kuramoto