Patents by Inventor Yosuo Ohashi

Yosuo Ohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6813163
    Abstract: A plurality of converter circuits is connected in parallel while reducing conduction loss. A converter circuit is formed on each of a plurality of circuit boards, and a plurality of types of terminal connection patterns containing power input terminal connection patterns and power output terminal connection patterns are formed on the end portions of each of the circuit boards with the disposition positions substantially matching each other. The terminal connection patterns at the same position of each circuit board are sandwiched by each of clips of a common terminal member, each of the circuit boards is laminated and fixed, and the converter circuits of each of the circuit boards are connected in parallel. The conduction path for electrically connecting the converter circuit of each circuit board becomes short, making it possible to reduce conduction loss.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: November 2, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Keiji Inoue, Yosuo Ohashi
  • Publication number: 20020186553
    Abstract: A plurality of converter circuits is connected in parallel while reducing conduction loss. A converter circuit is formed on each of a plurality of circuit boards, and a plurality of types of terminal connection patterns containing power input terminal connection patterns and power output terminal connection patterns are formed on the end portions of each of the circuit boards with the disposition positions substantially matching each other. The terminal connection patterns at the same position of each circuit board are sandwiched by each of clips of a common terminal member, each of the circuit boards is laminated and fixed, and the converter circuits of each of the circuit boards are connected in parallel. The conduction path for electrically connecting the converter circuit of each circuit board becomes short, making it possible to reduce conduction loss.
    Type: Application
    Filed: August 1, 2002
    Publication date: December 12, 2002
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Keiji Inoue, Yosuo Ohashi
  • Publication number: 20020044433
    Abstract: A plurality of converter circuits is connected in parallel while reducing conduction loss. A converter circuit is formed on each of a plurality of circuit boards, and a plurality of types of terminal connection patterns containing power input terminal connection patterns and power output terminal connection patterns are formed on the end portions of each of the circuit boards with the disposition positions substantially matching each other. The terminal connection patterns at the same position of each circuit board are sandwiched by each of clips of a common terminal member, each of the circuit boards is laminated and fixed, and the converter circuits of each of the circuit boards are connected in parallel. The conduction path for electrically connecting the converter circuit of each circuit board becomes short, making it possible to reduce conduction loss.
    Type: Application
    Filed: August 1, 2001
    Publication date: April 18, 2002
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Keiji Inoue, Yosuo Ohashi