Patents by Inventor You-Hsien LIN

You-Hsien LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11852657
    Abstract: A semiconductor tester and a method for calibrating a probe card and a device under testing (DUT) are disclosed. The semiconductor tester includes: a support platform, including a support surface and configured to be able to move along a direction parallel to the support surface and rotate around a rotating shaft perpendicular to the support surface; a probe card including a plurality of probes stretching towards the support platform; and an alignment assembly, including: at least two first laser emitting apparatuses emitting a plurality of first laser beams; and a second laser emitting apparatus emitting a plurality of second laser beams. The first laser beams and the second laser beams are perpendicular to each other and are each arranged sequentially along a direction perpendicular to the support surface. The semiconductor tester aligns a probe card to a DUT with improved accuracy, thereby preventing the damage to the probe card.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: December 26, 2023
    Assignee: Changxin Memory Technologies, Inc.
    Inventors: You-Hsien Lin, Yung-Shiuan Chen, Tzu-Chia Liu, Hsin-Hsuan Chen, Wei Chou Wang, Shan Zhang, Zhenzheng Jiang, Mingxiu Zhong
  • Patent number: 11614481
    Abstract: A TSV detecting circuit, TSV detecting methods, and an integrated circuit thereof are disclosed by the present disclosure. The TSV detecting circuit includes a first detecting module includes: a first comparison unit; a first input unit, for transmitting an input signal to a first input of the first comparison unit controlled by a first clock signal; a first switching unit for transmitting a signal of a first node to a second input of the first comparison unit controlled by a first detection control signal, the first node coupled to a first terminal of the TSV; and a second detecting module includes: a second input unit for transmitting the input signal to a second node controlled by a second clock signal; a second switching unit for transmitting a signal of the second node to a second terminal of the TSV controlled a second detection control signal.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 28, 2023
    Assignee: Changxin Memory Technologies, Inc.
    Inventors: You-Hsien Lin, Yi-Jun Lu, Cheng-Jer Yang
  • Patent number: 11531057
    Abstract: The present disclosure relates to a through-silicon via (TSV) crack detecting apparatus, a detecting method, and a fabricating method of the semiconductor device. The TSV crack detecting apparatus includes a test TSV, a conductive liner, a second dielectric liner, a first contact, and a second contact. The test TSV is disposed within a semiconductor substrate, including a conductive channel and a first dielectric liner for isolating the conductive channel and the semiconductor substrate. The conductive liner surrounds the first dielectric liner. The second dielectric liner surrounds the conductive liner. The first contact is connected to the conductive channel. The second contact is connected to the conductive liner. A voltage difference between the first contact and the second contact is used to determine whether a TSV within a predetermined range to the test TSV has a crack based on a conductive state between the first contact and the second contact.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: December 20, 2022
    Assignee: Changxin Memory Technologies, Inc.
    Inventors: You-Hsien Lin, Chih-Wei Chang
  • Patent number: 11408929
    Abstract: A through-silicon via (TSV) detecting circuit, a detecting method, and an integrated circuit having the same are disclosed. The TSV detecting circuit includes: an input circuit including a first switching circuit, the first switching circuit comprising a control terminal coupled to a first detection control signal, a first terminal coupled to a first power signal, and a second terminal coupled to a first terminal of a TSV, wherein the first switching circuit is configured to be turned on in response to the first detection control signal to transmit a first power signal to the first terminal of the TSV; and a comparison circuit comprising a first input coupled to a second terminal of the TSV, and a second input coupled to a reference signal, wherein the comparison circuit is configured to compare a signal of the second terminal of the TSV and the reference signal.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: August 9, 2022
    Assignee: Changxin Memory Technologies, Inc.
    Inventor: You-Hsien Lin
  • Patent number: 11114417
    Abstract: An integrated circuit (IC) with a TSV test circuit, a TSV test method are provided, pertaining to IC technologies. The IC may include a first TSV, a second TSV and a phase detector. A first end of the first TSV may be coupled to a predetermined signal output, and a second end of the first TSV may be coupled to a first end of the second TSV. A second end of the second TSV may be coupled to a first input of the phase detector, and a second input of the phase detector may be coupled to the predetermined signal output. The phase detector may be configured to determine a phase difference between signals at the first and the second inputs. In this IC, a defective TSV can be identified and segregated with a redundant TSV. This IC facilitates efficient fault correction and signal routing in the IC.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 7, 2021
    Assignee: Changxin Memory Technologies, Inc.
    Inventor: You-Hsien Lin
  • Publication number: 20210270868
    Abstract: A semiconductor tester and a method for calibrating a probe card and a device under testing (DUT) are disclosed. The semiconductor tester includes: a support platform, including a support surface and configured to be able to move along a direction parallel to the support surface and rotate around a rotating shaft perpendicular to the support surface; a probe card including a plurality of probes stretching towards the support platform; and an alignment assembly, including: at least two first laser emitting apparatuses emitting a plurality of first laser beams; and a second laser emitting apparatus emitting a plurality of second laser beams. The first laser beams and the second laser beams are perpendicular to each other and are each arranged sequentially along a direction perpendicular to the support surface. The semiconductor tester aligns a probe card to a DUT with improved accuracy, thereby preventing the damage to the probe card.
    Type: Application
    Filed: May 14, 2021
    Publication date: September 2, 2021
    Inventors: You-Hsien LIN, Yung-Shiuan CHEN, Tzu-Chia LIU, Hsin-Hsuan CHEN, Wei Chou WANG, Shan ZHANG, Zhenzheng JIANG, Mingxiu ZHONG
  • Publication number: 20210270889
    Abstract: A signal transmission circuit and method for testing an integrated circuit (IC) are disclosed. The signal transmission circuit includes: an input circuit, configured to generate a first test signal in response to a first control signal and a clock signal; a transfer chain, including multiple stages of serially-connected transfer circuits, where adjacent transfer circuits in the transfer chain are connected via a through silicon via (TSV), the transfer circuit on one end of the transfer chain is connected to the input circuit, and the multiple stages of transfer circuits transfer the first test signal in stage by stage in response to the clock signal; and multiple signal output ends, where a first test signal input end of each stage of transfer circuit is correspondingly connected to one signal output end. The signal transmission circuit improves the effective utilization rate of a chip in an IC having a TSV test circuit.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventor: You-Hsien LIN
  • Publication number: 20210239751
    Abstract: A TSV detecting circuit, TSV detecting methods, and an integrated circuit thereof are disclosed by the present disclosure. The TSV detecting circuit includes a first detecting module includes: a first comparison unit; a first input unit, for transmitting an input signal to a first input of the first comparison unit controlled by a first clock signal; a first switching unit for transmitting a signal of a first node to a second input of the first comparison unit controlled by a first detection control signal, the first node coupled to a first terminal of the TSV; and a second detecting module includes: a second input unit for transmitting the input signal to a second node controlled by a second clock signal; a second switching unit for transmitting a signal of the second node to a second terminal of the TSV controlled a second detection control signal.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 5, 2021
    Inventors: You-Hsien LIN, Yi-Jun LU, Cheng-Jer YANG
  • Publication number: 20210215755
    Abstract: A through-silicon via (TSV) detecting circuit, a detecting method, and an integrated circuit having the same are disclosed. The TSV detecting circuit includes: an input circuit including a first switching circuit, the first switching circuit comprising a control terminal coupled to a first detection control signal, a first terminal coupled to a first power signal, and a second terminal coupled to a first terminal of a TSV, wherein the first switching circuit is configured to be turned on in response to the first detection control signal to transmit a first power signal to the first terminal of the TSV; and a comparison circuit comprising a first input coupled to a second terminal of the TSV, and a second input coupled to a reference signal, wherein the comparison circuit is configured to compare a signal of the second terminal of the TSV and the reference signal.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Inventor: You-Hsien LIN
  • Publication number: 20210088576
    Abstract: The present disclosure relates to a through-silicon via (TSV) crack detecting apparatus, a detecting method, and a fabricating method of the semiconductor device. The TSV crack detecting apparatus includes a test TSV, a conductive liner, a second dielectric liner, a first contact, and a second contact. The test TSV is disposed within a semiconductor substrate, including a conductive channel and a first dielectric liner for isolating the conductive channel and the semiconductor substrate. The conductive liner surrounds the first dielectric liner. The second dielectric liner surrounds the conductive liner. The first contact is connected to the conductive channel. The second contact is connected to the conductive liner. A voltage difference between the first contact and the second contact is used to determine whether a TSV within a predetermined range to the test TSV has a crack based on a conductive state between the first contact and the second contact.
    Type: Application
    Filed: December 1, 2020
    Publication date: March 25, 2021
    Inventors: You-Hsien LIN, Chih-Wei CHANG
  • Publication number: 20210074680
    Abstract: An integrated circuit (IC) with a TSV test circuit, a TSV test method are provided, pertaining to IC technologies. The IC may include a first TSV, a second TSV and a phase detector. A first end of the first TSV may be coupled to a predetermined signal output, and a second end of the first TSV may be coupled to a first end of the second TSV. A second end of the second TSV may be coupled to a first input of the phase detector, and a second input of the phase detector may be coupled to the predetermined signal output. The phase detector may be configured to determine a phase difference between signals at the first and the second inputs. In this IC, a defective TSV can be identified and segregated with a redundant TSV. This IC facilitates efficient fault correction and signal routing in the IC.
    Type: Application
    Filed: November 17, 2020
    Publication date: March 11, 2021
    Inventor: You-Hsien LIN
  • Patent number: 9893847
    Abstract: A wireless communication device and a digital self-interference estimation method thereof are provided. The wireless communication device, at respective timings, receives a plurality of self-interference signals and generates a plurality of ideal transmitting signals. The wireless communication device calculates a signal adjusting vector based on the self-interference signals and the ideal transmitting signals at different timings. The wireless communication device generates a main ideal transmitting signal at a main timing, and calculates, based on the signal adjusting vector, a main self-interference signal corresponding to the main timing according to the received self-interference and the main ideal transmitting signal.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: February 13, 2018
    Assignee: Institute For Information Industry
    Inventors: Yuan-Te Liao, Terng-Yin Hsu, You-Hsien Lin, Youn-Tai Lee, Jian-Cheng Li
  • Patent number: 9838171
    Abstract: Methods of data allocation and signal receiving, a wireless transmitting apparatus, and a wireless receiving apparatus are provided based on orthogonal frequency division multiplexing (OFDM) technology. The wireless transmitting apparatus obtains a data stream and allocates the data stream to a first sub-carrier set. Each of the first sub-carrier set and a second sub-carrier set has sub-carriers with opposite frequencies to each other, respectively. The second sub-carrier is emptied or allocated according the data stream allocated to the first sub-carrier set. The data stream is converted into an OFDM signal transmitted through a transmitting module. The wireless receiving apparatus includes a single branch receiver for receiving a radio frequency (RF) signal and outputting a baseband signal. Subsequently, the data stream is restored from the baseband signal.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: December 5, 2017
    Assignee: Acer Incorporated
    Inventors: Tsung-Yu Tsai, You-Hsien Lin, Hsuan-Li Lin, Terng-Yin Hsu
  • Patent number: 9799337
    Abstract: A microphone apparatus is provided. Whether an electronic signal converted from an audio signal is in compliance with a preset sound characteristic and a preset voice recognition information is determined. When the electronic signal is in compliance with the preset sound characteristic and the preset voice recognition information, an actuation control signal is outputted, so as to trigger an operation of an external circuit external to the microphone apparatus.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: October 24, 2017
    Assignee: MERRY ELECTRONICS(SUZHOU) CO., LTD.
    Inventors: Chao-Sen Chang, Shen-Hang Wei, You-Hsien Lin, Yung-Shiang Chang
  • Publication number: 20170256263
    Abstract: A microphone apparatus is provided. Whether an electronic signal converted from an audio signal is in compliance with a preset sound characteristic and a preset voice recognition information is determined. When the electronic signal is in compliance with the preset sound characteristic and the preset voice recognition information, an actuation control signal is outputted, so as to trigger an operation of an external circuit external to the microphone apparatus.
    Type: Application
    Filed: April 19, 2016
    Publication date: September 7, 2017
    Inventors: Chao-Sen Chang, Shen-Hang Wei, You-Hsien Lin, Yung-Shiang Chang
  • Patent number: 9608779
    Abstract: Methods of data allocation and signal receiving, a wireless transmitting apparatus, and a wireless receiving apparatus are provided based on orthogonal frequency division multiplexing (OFDM) technology. The wireless transmitting apparatus obtains a data stream and allocates the data stream to a first sub-carrier set. Each of the first sub-carrier set and a second sub-carrier set has sub-carriers with opposite frequencies to each other, respectively. The second sub-carrier is emptied or allocated according the data stream allocated to the first sub-carrier set. The data stream is converted into an OFDM signal transmitted through a transmitting module. The wireless receiving apparatus includes a single branch receiver for receiving a radio frequency (RF) signal and outputting a baseband signal. Subsequently, the data stream is restored from the baseband signal.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: March 28, 2017
    Assignee: Acer Incorporated
    Inventors: Tsung-Yu Tsai, You-Hsien Lin, Hsuan-Li Lin, Terng-Yin Hsu
  • Publication number: 20170048030
    Abstract: Methods of data allocation and signal receiving, a wireless transmitting apparatus, and a wireless receiving apparatus are provided based on orthogonal frequency division multiplexing (OFDM) technology. The wireless transmitting apparatus obtains a data stream and allocates the data stream to a first sub-carrier set. Each of the first sub-carrier set and a second sub-carrier set has sub-carriers with opposite frequencies to each other, respectively. The second sub-carrier is emptied or allocated according the data stream allocated to the first sub-carrier set. The data stream is converted into an OFDM signal transmitted through a transmitting module. The wireless receiving apparatus includes a single branch receiver for receiving a radio frequency (RF) signal and outputting a baseband signal. Subsequently, the data stream is restored from the baseband signal.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 16, 2017
    Inventors: Tsung-Yu Tsai, You-Hsien Lin, Hsuan-Li Lin, Terng-Yin Hsu
  • Publication number: 20170048032
    Abstract: Methods of data allocation and signal receiving, a wireless transmitting apparatus, and a wireless receiving apparatus are provided based on orthogonal frequency division multiplexing (OFDM) technology. The wireless transmitting apparatus obtains a data stream and allocates the data stream to a first sub-carrier set. Each of the first sub-carrier set and a second sub-carrier set has sub-carriers with opposite frequencies to each other, respectively. The second sub-carrier is emptied or allocated according the data stream allocated to the first sub-carrier set. The data stream is converted into an OFDM signal transmitted through a transmitting module. The wireless receiving apparatus includes a single branch receiver for receiving a radio frequency (RF) signal and outputting a baseband signal. Subsequently, the data stream is restored from the baseband signal.
    Type: Application
    Filed: September 23, 2016
    Publication date: February 16, 2017
    Applicant: Acer Incorporated
    Inventors: Tsung-Yu Tsai, You-Hsien Lin, Hsuan-Li Lin, Terng-Yin Hsu
  • Publication number: 20150063226
    Abstract: A method of transmitting a downlink radio signal from a distributed antenna system to a mobile device is provided. The distributed antenna system includes a plurality of transceivers and a control module. Each of the transceivers receives an uplink radio signal from the mobile device as a respective received signal. Each of the transceivers transmits the received signal to the control module. The control module provides to each of the transceivers the downlink radio signal with a respective intensity, which is determined by the control module according to an intensity of the received signal from the transceiver. Each of the transceivers transmits the downlink radio signal to the mobile device.
    Type: Application
    Filed: April 25, 2014
    Publication date: March 5, 2015
    Applicant: Amoesolu Corporation
    Inventors: Terng-Yin HSU, Cheng-Yen CHEN, Wen-Jye HUANG, Ray-Shiang JEAN, Shao-Ying YEH, You-Hsien LIN
  • Patent number: 8971466
    Abstract: A receiver with Inphase-Quadrature (I-Q) imbalance compensation and an I-Q imbalance compensation method thereof are provided. The receiver chooses a first receiving signal which includes a first data and a first noise, as well as a second receiving signal which includes a second data and a second noise from a plurality of receiving signals. The first data have a first positive frequency data and a first negative frequency data, while the second data have a second positive frequency data and a second negative frequency data. The receiver calculates an I-Q imbalance compensation parameter according to the first receiving signal and the second receiving signal, and compensates for a third receiving signal according to the I-Q imbalance compensation parameter. The I-Q imbalance compensation method is applied to the receiver to implement the aforesaid operations.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: March 3, 2015
    Assignee: Institute for Information Industry
    Inventors: Tsung-Yu Tsai, Chun-Che Chien, Shu-Tsz Liu, You-Hsien Lin, Terng-Yin Hsu, Wei-Chi Lai, Shao-Ying Yeh