Abstract: A chip scale package includes a patterned circuit layer attached to the active surface of a semiconductor chip through an anisotropic conductive adhesive layer such that contact pads on a lower surface of the patterned circuit layer are electrically coupled to corresponding bonding pads on the semiconductor chip. The patterned circuit layer has a plurality of openings formed therein at locations corresponding to the contact pads such that each of the contact pads has a portion exposed from an upper surface of the patterned circuit layer through the corresponding opening. A plurality of metal bumps are respectively disposed in the openings and mounted to the exposed portions of the contact pads for making external electrical connection. The present invention further provides a method for manufacturing the chip scale package at the wafer-level.

Abstract: A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

Abstract: A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The electromagnetic interference shielding layer is a plated metal layer in contact with the package body, and the plated metal layer is connected to a ground trace extending on the upper surface of the substrate.

Abstract: A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

Abstract: A semiconductor package comprises a silicon substrate having an insulative surface; a patterned metal layer, formed on the insulative surface of the silicon substrate; an insulation layer formed on the patterned metal layer, and the patterned metal layer being partially exposed for functioning as at least a set of the device attaching pads and ball attaching pads; at least a device electrically connected to the set of the device attaching pads; a sealing compound for covering portions of the insulative surface of the silicon substrate and encapsulating the devices; and a plurality of solder balls attached to the set of ball attaching pads.

Abstract: A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

Abstract: A semiconductor package comprises a silicon substrate having an insulative surface; a patterned metal layer, formed on the insulative surface of the silicon substrate; an insulation layer formed on the patterned metal layer, and the patterned metal layer being partially exposed for functioning as at least a set of the device attaching pads and ball attaching pads; at least a device electrically connected to the set of the device attaching pads; a sealing compound for covering portions of the insulative surface of the silicon substrate and encapsulating the devices; and a plurality of solder balls attached to the set of ball attaching pads.

Abstract: A semiconductor package includes a semiconductor device and a passive component mounted and electrically coupled to a substrate. The passive component is disposed within a cavity portion formed on an upper surface of the substrate and the semiconductor device is disposed across the cavity portion of the substrate above the passive component.

Abstract: The fabrication and device of package structure with a plurality of conductive contacts are provided herein. At least one chip is attached among the conductive pads on the surface of a wafer. A number of conductive wires are attached on the conductive pads and encapsulated by a layer. The layer is removed from the top thereof until to expose the conductive contacts derived from the conductive wires.

Abstract: A semiconductor package includes a semiconductor device and a passive component mounted and electrically coupled to a substrate. The passive component is disposed within a cavity portion formed on an upper surface of the substrate and the semiconductor device is disposed across the cavity portion of the substrate above the passive component.

Abstract: An image sensor package module with a leadless leadframe between chips includes a chip carrier, an image sensor chip, an integrated circuit chip, and a flexible printed circuit board. The chip carrier comprises a leadless leadframe and a pre-molded body. The leadless leadframe has a plurality of leads. The pre-molded body is completely filled among the leads and has a dam on the upper surfaces of the leads. The upper surfaces and lower surfaces of the leads are exposed on the pre-molded body. The image sensor chip is attached to the chip carrier inside the dam and electrically connected to the upper surfaces of the leads. The integrated circuit chip is mounted on the lower surfaces of the leads via bumps. The flexible printed circuit board is electrically connected to the leads for signal transmission.