Patents by Inventor Youbun Ito
Youbun Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160117042Abstract: According to one embodiment, a touch sensor includes an insulating substrate, a sensing electrode formed on the insulating substrate, and an alignment mark formed on the insulating substrate, wherein the sensing electrode is transparent, and the alignment mark is transparent and includes a slit.Type: ApplicationFiled: October 9, 2015Publication date: April 28, 2016Applicant: Japan Display Inc.Inventors: Youbun ITO, Koichiro ADACHI
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Patent number: 8411232Abstract: A liquid crystal display with a first substrate and a first pixel electrode on the first substrate. The first pixel electrode extends along first and second directions and has a plurality of first pixel electrode strips arranged along a first direction. The display also has a common electrode on the first substrate that is spaced from the pixel electrode along a third direction. In addition, the display has a light shield extending along the second direction and positioned to overlap at least part of an outermost strip of the first pixel electrode along the first direction.Type: GrantFiled: February 4, 2011Date of Patent: April 2, 2013Assignee: Sony CorporationInventors: Takeyuki Tsuruma, Hironao Tanaka, Makoto Watanabe, Hidemasa Yamaguchi, Amane Higashi, Youbun Ito, Yusuke Goto
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Publication number: 20110211145Abstract: A liquid crystal display with a first substrate and a first pixel electrode on the first substrate. The first pixel electrode extends along first and second directions and has a plurality of first pixel electrode strips arranged along a first direction. The display also has a common electrode on the first substrate that is spaced from the pixel electrode along a third direction. In addition, the display has a light shield extending along the second direction and positioned to overlap at least part of an outermost strip of the first pixel electrode along the first direction.Type: ApplicationFiled: February 4, 2011Publication date: September 1, 2011Applicant: SONY CORPORATIONInventors: Takeyuki Tsuruma, Hironao Tanaka, Makoto Watanabe, Hidemasa Yamaguchi, Amane Higashi, Youbun Ito, Yusuke Goto
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Publication number: 20050103441Abstract: There is provided an etching method and a plasma etching apparatus capable of taking a large etching selection ratio and of forming a hole having an appropriate shape. When etching an etching target film 204 by using an organic film 202 having a predetermined pattern as a mask, processing gas is introduced into an airtight processing container 104. There are provided a high frequency power source 122 of 40 MHz and a high frequency power source 128 of 3.2 MHz, by which two different kinds of high frequency powers are applied to a lower electrode 106. The power of each high frequency power is properly combined, thereby executing the etching process by using low plasma electron density Ne and high self-bias voltage Vdc which are generated by high frequency power.Type: ApplicationFiled: May 13, 2004Publication date: May 19, 2005Inventors: Masanobu Honda, Kazuya Nagaseki, Hanako Kida, Koichi Yatsuda, Youbun Ito, Koichiro Inazawa, Rie Inazawa, Hisataka Hayashi
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Patent number: 6753263Abstract: A lower electrode 106 with the temperature at its mounting surface set at 40° C. is provided inside a processing chamber 104 of an etching apparatus 100. After a wafer W is placed on the lower electrode 106, a processing gas with its gas composition and gas flow rate expressed as C4F8: CH2F2: Ar=7:4:500 (sccm) is induced into the processing chamber 104 while sustaining the pressure of the atmosphere inside the processing chamber 104 at 50 (mTorr). High-frequency power at 1500 (W) with the frequency at 13.56 (MHz) is applied to the lower electrode 106 to generate plasma. With the plasma thus generated, a carbon film is formed at shoulder 207 of an SiNx film layer 206 exposed inside a contact hole 210 and, at the same time, accumulation of carbon at the bottom of the contact hole 210 is prevented, to form a contact hole 210 achieving a high aspect ratio while preventing damage to the SiNx film layer.Type: GrantFiled: February 5, 2001Date of Patent: June 22, 2004Assignee: Tokyo Electron LimitedInventors: Youbun Ito, Masahiro Yamada, Kouichiro Inazawa
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Patent number: 6602435Abstract: A processing gas constituted of C5F8, O2 and Ar achieving a flow rate ratio of 1≦C5F8 flow rate/O2 flow rate≦1.625 is supplied into a processing chamber 102 of an etching apparatus 100 and the atmosphere pressure is set within a range of 45 mTorr˜50 mTorr. High-frequency power is applied to a lower electrode 110 sustained within a temperature range of 20° C.˜40° C. on which a wafer W is mounted to raise the processing gas to plasma, and using the plasma, a contact hole 210 is formed at an SiO2 film 208 on an SiNx film 206 formed at the wafer W. The use of C5F8 and O2 makes it possible to form a contact hole 210 achieving near-perfect verticality at the SiO2 film 208 and also improves the selection ratio of the SiO2 film 208 relative to the SiNx film 206. C5F8, which becomes decomposed over a short period of time when released into the atmosphere, does not induce the greenhouse effect.Type: GrantFiled: June 26, 2000Date of Patent: August 5, 2003Assignee: Tokyo Electron LimitedInventors: Masahiro Yamada, Youbun Ito, Kouichiro Inazawa
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Publication number: 20030102087Abstract: In a plasma processing apparatus of this invention, a ring-like segment magnet is formed around an upper portion of a chamber so a magnetic field is generated around a processing space. The segment magnet can be rotated by a rotating mechanism in the circumferential direction of the chamber. A magnetic field is generated around the processing space by a magnetic field generating means. That position where a substrate to be processed is present is set in a substantial non-magnetic field state, so charge-up damage is prevented. Due to the plasma confining effect of this magnetic field, the plasma processing rate of the substrate to be processed is set to be almost equal between the edge and center of the substrate to be processed, thereby making the processing rate uniform. A pivoting means is provided so as to alter the gap between the magnets or directions of magnetization thereof.Type: ApplicationFiled: November 29, 2002Publication date: June 5, 2003Inventors: Youbun Ito, Takayuki Katsunuma, Koichiro Inazawa, Tomoki Suemasa, Jun Hirose, Hiroo Ono, Kazuya Nagaseki
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Patent number: 6465359Abstract: A method and system for processing a substrate in the presence of high purity C5F8. When processing oxides and dielectrics in a gas plasma processing system, C5F8 is used in combination with a carrier gas (e.g., Ar) and one or more of CO and O2. When using a silicon nitride (SixNy) layer as an etch stop, effective etching is performed due to the selectivity of oxides versus silicon nitride. The method is used when etching down to self-aligning contacts and other layers. The method may be practiced with or without using an anti-reflective coating underneath the photoresist layer.Type: GrantFiled: September 17, 1999Date of Patent: October 15, 2002Assignee: Tokyo Electron Ltd.Inventors: Masahiro Yamada, Youbun Ito, Kouichiro Inazawa, Abron Toure, Kunihiko Hinata, Hiromi Sakima
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Publication number: 20020030174Abstract: A method and system for processing a substrate in the presence of high purity C5F8. When processing oxides and dielectrics in a gas plasma processing system, C5F8 is used in combination with a carrier gas (e.g., Ar) and one or more of CO and O2. When using a silicon nitride (SixNy) layer as an etch stop, effective etching is performed due to the selectivity of oxides versus silicon nitride. The method is used when etching down to self-aligning contacts and other layers. The method may be practiced with or without using an anti-reflective coating underneath the photoresist layer.Type: ApplicationFiled: September 17, 1999Publication date: March 14, 2002Inventors: MASAHIRO YAMADA, YOUBUN ITO, KOUICHIRO INAZAWA, ABRON TOURE, KUNIHIKO HINATA, HIROMI SAKIMA
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Patent number: 6159862Abstract: A method and system for processing a substrate in the presence of high purity C.sub.5 F.sub.8. When processing oxides and dielectrics in a gas plasma processing system, C.sub.5 F.sub.8 is used in combination with a carrier gas (e.g., Ar) and one or more of CO and O.sub.2. When using a silicon nitride (Si.sub.x N.sub.y) layer as an etch stop, effective etching is performed due to the selectivity of oxides versus silicon nitride. The method is used when etching down to self-aligning contacts and other layers. The method may be practiced with or without using an anti-reflective coating underneath the photoresist layer.Type: GrantFiled: June 1, 1998Date of Patent: December 12, 2000Assignee: Tokyo Electron Ltd.Inventors: Masahiro Yamada, Youbun Ito, Kouichiro Inazawa, Abron Toure, Kunihiko Hinata, Hiromi Sakima