Abstract: A digital integrated circuit incorporates a plurality of multi-port flip-flop circuits which are interconnected by a plurality of gate circuits. A separate source of clock pulses is provided for each of the ports of the multi-port flip-flop circuits, and each clock pulse source is selectively effective to cause the multi-port flip-flop circuits to perform independent functions. During operation under one source of clock pulses, the flip-flops perform their ordinary function as D type flip-flops. During operation under another source of clock pulses, the flip-flops function as one or more shift registers in order to set the flip-flops to a predefined initial state in accordance with serial input data, and/or to provide serial output data in response to the state of the flip-flops following a preceding operation.