Abstract: A semiconductor device includes a semiconductor switching element having a drift layer, a body region, a first impurity region, trench gate structures, a high impurity concentration layer, an interlayer insulation film, an upper electrode and a lower electrode. The body region is arranged on the drift layer. The first impurity region is arranged in a surface portion of the body region in the body region and has an impurity concentration higher than the drift layer. Each of the trench gate structures includes a trench. A shield electrode, an intermediate insulation film and a gate electrode layer are stacked through an insulation film in the trench. The high impurity concentration layer is arranged on a side opposite to the body region to sandwich the drift layer between the high impurity concentration layer and the body region. The interlayer insulation film is arranged on the trench gate structures.

Abstract: The body region is formed between the plurality of trench gate structures, and the first impurity region is formed in a surface portion of the body region. The body region includes a second conductive type contact region having an impurity concentration of the second conductive type higher than the body region and contacting the upper electrode. The first impurity region includes a first conductive type contact region having the impurity concentration of the first conductive type impurity higher than the first impurity region and contacting the upper electrode. A second conductive type contact region is formed in a part of the body region where the first impurity region is not formed without forming the first conductive type contact region therein, and a contact trench is formed in the first impurity region. The first conductive type contact region is formed in the contact trench.

Abstract: A semiconductor device includes a semiconductor substrate; a semiconductor element disposed on a first surface of the semiconductor substrate; an insulation film, which is disposed on the first surface of the semiconductor substrate to cover the semiconductor element and has first contact holes exposing a region in the first surface of the semiconductor substrate, and second contact holes exposing the semiconductor element; a first electrode electrically connected to a region in the first surface of the semiconductor substrate through the first contact holes; and a second electrode electrically connected to the semiconductor element through the second contact hole. The insulation film has a first surface, which is flattened and opposite from the first surface of the semiconductor substrate. An interval between the first surface of the insulation film and the first surface of the semiconductor substrate is equal along a planer direction of the semiconductor substrate.

Abstract: Roughness is eliminated and planarization is achieved by a metal oxide film on a surface of a lower electrode. Consequently, damage on a capacitive film caused by the roughness of the lower electrode is reduced. Furthermore, physical damage on the capacitive film is reduced by forming a first layer of an upper electrode by, for example, CVD. Consequently, the damage on the capacitive film is suppressed, and the reliability of the capacitive film is improved. Furthermore, not by forming the whole upper electrode by the CVD or the like, but by forming a second layer by PCD or the like on the first layer, an increase in resistance of the upper electrode is suppressed as well.

Abstract: Roughness is eliminated and planarization is achieved by a metal oxide film on a surface of a lower electrode. Consequently, damage on a capacitive film caused by the roughness of the lower electrode is reduced. Furthermore, physical damage on the capacitive film is reduced by forming a first layer of an upper electrode by, for example, CVD. Consequently, the damage on the capacitive film is suppressed, and the reliability of the capacitive film is improved. Furthermore, not by forming the whole upper electrode by the CVD or the like, but by forming a second layer by PCD or the like on the first layer, an increase in resistance of the upper electrode is suppressed as well.

Abstract: A method for manufacturing a semiconductor device includes: preparing a semiconductor substrate, in which a first semiconductor layer is formed on a substrate; forming a first concave portion in the first semiconductor layer; forming trenches on the first semiconductor layer in the first concave portion; epitaxially growing a second semiconductor layer for embedding in each trench and the first concave portion; forming a SJ structure having PN columns including the second semiconductor layer in each trench and the first semiconductor layer between the trenches; and forming the vertical MOSFET by: forming a channel layer and a source region contacting the channel layer on the SJ structure; forming a gate electrode over the channel layer through a gate insulating film; forming a source electrode connected to the source region; and forming a drain electrode on a rear of the substrate.

Abstract: A trench is etched in a semiconductor wafer by turning a first introduced gas introduced into a reaction chamber into plasma. A protection film is formed on a wall surface of the trench by turning a second introduced gas introduced into the reaction chamber into plasma. The protection film formed on a bottom surface of the trench is removed by turning a third introduced gas introduced into the reaction chamber into plasma. The reaction chamber is evacuated after the protection film formed on the bottom surface of the trench is removed.

Abstract: A method for manufacturing a semiconductor device includes: preparing a semiconductor substrate, in which a first semiconductor layer is formed on a substrate; forming a first concave portion in the first semiconductor layer; forming trenches on the first semiconductor layer in the first concave portion; epitaxially growing a second semiconductor layer for embedding in each trench and the first concave portion; forming a SJ structure having PN columns including the second semiconductor layer in each trench and the first semiconductor layer between the trenches; and forming the vertical MOSFET by: forming a channel layer and a source region contacting the channel layer on the SJ structure; forming a gate electrode over the channel layer through a gate insulating film; forming a source electrode connected to the source region; and forming a drain electrode on a rear of the substrate.

Abstract: A trench is etched in a semiconductor wafer by turning a first introduced gas introduced into a reaction chamber into plasma. A protection film is formed on a wall surface of the trench by turning a second introduced gas introduced into the reaction chamber into plasma. The protection film formed on a bottom surface of the trench is removed by turning a third introduced gas introduced into the reaction chamber into plasma. The reaction chamber is evacuated after the protection film formed on the bottom surface of the trench is removed.

Abstract: In a semiconductor device manufacturing method, an insulating layer is formed on a front surface of a semiconductor substrate. Trenches are formed in the substrate by using the insulating layer as a mask so that a first portion of the insulating layer is located on the front surface between the trenches and that a second portion of the insulating layer is located on the front surface at a position other than between the trenches. The entire first portion is removed, and the second portion around an opening of each trench is removed. The trenches are filled with an epitaxial layer by epitaxially growing the epitaxial layer over the front surface side. The front surface side is polished by using the remaining second portion as a polishing stopper.