Patents by Inventor Youichi Enomoto

Youichi Enomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6724216
    Abstract: A rapid single-flux-quantum RSFQ logic circuit includes a first circuit portion having a first end grounded and having in-series connected first and second Josephson junctions. A second circuit portion has a first end grounded and has in-series connected third and fourth Josephson junctions. A first inductance element connects a second end of the first circuit portion to a second end of the second circuit portion. A tap is provided in the first inductance element, an input current signal being supplied to the tap. A bias current source is connected to a first connection node between the first and second Josephson junctions. A second inductance element connects the first connection node to a second connection node between the third and fourth Josephson junctions. A superconducting quantum interference device has fifth and sixth Josephson junctions and is coupled to the second inductance element through a magnetic field.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: April 20, 2004
    Assignees: Fujitsu Limited, NEC Corporation, International Superconductivity Technology Center, The Juridicial Foundation
    Inventors: Hideo Suzuki, Shuichi Nagasawa, Kazunori Miyahara, Youichi Enomoto
  • Patent number: 6725248
    Abstract: A decimation filter includes a first circuit block for respectively delaying by one clock an input signal synchronized with a clock signal and for producing a plurality of delayed signals, adders for adding or merging by confluence buffers the delayed signals to obtain total signals and for feeding the total signals to one signal line, and a second circuit block for counting pulses of the total signals. The filter provides an analog-to-digital converter which processes signals at a high speed and which is resistive against overflow.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: April 20, 2004
    Assignees: Hitachi, Ltd., International Superconductivity Technology Center, NEC Corporation, Kabushiki Kaisha Toshiba
    Inventors: Haruhiro Hasegawa, Kazunori Miyahara, Tatsunori Hashimoto, Shuichi Nagasawa, Youichi Enomoto
  • Patent number: 6613463
    Abstract: A superconducting laminated oxide substrate, which comprises a laminate a layer of a superconducting oxide crystal substrate made of a superconducting oxide single crystal or a superconducting oxide polycrystal and a layer of a reinforcing crystal substrate, prevents cracks from occurring in the superconducting oxide crystal substrate due to the heat treatment conducted for the purpose of forming an insulation film or a conductor film, and provides easy connectivity between electrodes and wiring formed on substrates located at upper and lower positions.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: September 2, 2003
    Assignee: International Superconductivity Technology Center
    Inventors: Teruo Izumi, Satoshi Koyama, Yuh Shiohara, Shoji Tanaka, Masahiro Egami, Youichi Enomoto, Hideo Suzuki, Michitomo Iiyama
  • Publication number: 20020169079
    Abstract: A rapid single-flux-quantum RSFQ logic circuit includes a first circuit portion having a first end grounded and having in-series connected first and second Josephson junctions. A second circuit portion has a first end grounded and has in-series connected third and fourth Josephson junctions. A first inductance element connects a second end of the first circuit portion to a second end of the second circuit portion. A tap is provided in the first inductance element, an input current signal being supplied to the tap. A bias current source is connected to a first connection node between the first and second Josephson junctions. A second inductance element connects the first connection node to a second connection node between the third and fourth Josephson junctions. A superconducting quantum interference device has fifth and sixth Josephson junctions and is coupled to the second inductance element through a magnetic field.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Inventors: Hideo Suzuki, Shuichi Nagasawa, Kazunori Miyahara, Youichi Enomoto
  • Publication number: 20020075057
    Abstract: A superconducting power circuit comprises a bridge circuit, comprising superconducting switch elements having two or more Josephson junctions incorporated at each side of a rhombus-shaped bridge line, the superconducting switch elements being freely switchable by an outside magnetic field; and a control section which uses the outside magnetic field to switch one pair of the superconducting switch elements, arranged on opposite sides of the bridge circuit, to a superconductive state, and switch another pair of the superconducting switch elements to a normal-conductive state; the superconducting power circuit enables a large low-voltage dc current to be converted with high efficiency.
    Type: Application
    Filed: October 19, 2001
    Publication date: June 20, 2002
    Applicant: International Superconductivity Technology Center, The Juridical Foundation
    Inventors: Shoji Tanaka, Naoki Koshizuka, Keiichi Tanabe, Youichi Enomoto
  • Patent number: 6372368
    Abstract: An oxide superconducting element is formed on a substrate 10 by a layered structure 30 formed of oxide superconducting thin-film and a non-superconducting thin-film layers. The element is a superconducting regular current interval voltage step element. The current-voltage characteristic curve in a magnetic field has a voltage step being generated at regular bias current intervals. The layered structure 30 is formed by depositing alternately M′Ba2Cu3O7 (M′ is one or a combination of more than two elements of Nd, Sm and Eu) and M″Ba2Cu3O7 thin-films (M″ is either Pr or Sc, or a combination of the two elements).
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: April 16, 2002
    Assignee: International Superconductivity Technology Center
    Inventors: Gustavo Adolfo Alvarez, Youichi Enomoto
  • Patent number: 6242939
    Abstract: A superconducting circuit device of a voltage-type logic device is large in current driving capability and, accordingly, electric power consumption; however, the switching speed is not so fast, and a superconducting circuit device of a fluxoid-type logic device is small in current driving capability and, accordingly, the electric power consumption; however the switching speed is faster than that of the superconducting circuit device of the voltage-type logic device, wherein the superconducting circuit device of the voltage-type logic device and the superconducting circuit device of the fluxoid-type logic device are selectively used in a superconducting circuit such as a superconducting random access memory, a superconducting NOR circuit and a superconducting signal converting circuit so as to realize small electric power consumption and high-speed switching action.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: June 5, 2001
    Assignees: NEC Corporation, International Superconductivity Technology Center
    Inventors: Shuichi Nagasawa, Kazunori Miyahara, Youichi Enomoto
  • Patent number: 6207067
    Abstract: A method for fabricating an oxide superconducting device includes the steps of: forming a V-shaped groove on a substrate by a converging ion beam and forming a barrier with reduced superconductivity on the oxide superconducting thin-film on the groove to form a Josephson Junction, wherein the irradiation ion amount of the converging ion beam is varied according to the position of the beam within the groove in such a manner that an inclination angle of the inclined portion of the substrate is fixed. An oxide superconducting device (a Josephson Junction device) having a high degree of flexibility in arrangement and with high reproducibility, and having a high degree of uniformity is provided.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: March 27, 2001
    Assignees: Mitsubishi Denki Kabushiki Kaisha, International Superconductivity Technology Center
    Inventors: Naoki Yutani, Katsumi Suzuki, Youichi Enomoto, Jian-Guo Wen
  • Patent number: 6163713
    Abstract: In a high frequency transmission line having a dielectric substrate and a conductor line which is provided on the dielectric substrate for allowing electric current to flow therethrough, the conductor line has a non-grain-boundary oxide superconductor layer with twin walls but without grain boundaries. The high frequency transmission line is in the form of a plane circuit. It is preferable that an oriented oxide superconductor layer is provided between the dielectric substrate and the non-grain-boundary oxide superconductor layer.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: December 19, 2000
    Assignees: NEC Corporation, Sumitomo Electric Industries, Ltd., International Superconductivity Technology Center
    Inventors: Katsumi Suzuki, Sadahiko Miura, Takayuki Inoue, Koji Muranaka, Hideaki Zama, Youichi Enomoto, Tadataka Morishita, Shoji Tanaka
  • Patent number: 6074768
    Abstract: A process for forming a laminate of 123-type copper oxide superconductor thin films having dissimilar crystal axis orientations, a laminate of 123-type thin copper oxide superconductor layers exhibiting excellent superconducting property, and wiring for Josephson junction. A c-axis oriented single crystalline thin film of an oxide superconductor having a Y:Ba:Cu atomic ratio of substantially 1:2:3 and a lattice constant of 11.60 angstroms.ltoreq.c.ltoreq.11.70 angstroms at a temperature of 20.degree. C. under an oxygen partial pressure of 160 Torr is formed on a single crystalline substrate, and an a-axis oriented single crystalline thin film of said oxide superconductor is formed on the above laminated film relying upon a sputter deposition method.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: June 13, 2000
    Assignee: Kyocera Corporation
    Inventors: Yoshinori Matsunaga, Shuichi Fujino, Akihiro Odagawa, Youichi Enomoto
  • Patent number: 6016433
    Abstract: Any oxide superconductor Josephson junction element having an oxide superconductor oriented in the c-axis direction with respect to a substrate, and a needle-like, a-axis (or b-axis) oriented oxide superconductor. Both sides of the needle-like, a-axis (or b-axis) oriented oxide superconductor are sandwiched between the c-axis oriented superconductors. The crystal boundary sections between the needle-like, a-axis (or b-axis) oriented oxide superconductor and each of the c-axis oriented superconductors form a weak link of the Josephson junction. The needle-like, a-axis (or b-axis) oriented oxide superconductor is grown such that the c-axis direction thereof is oriented in the (110) direction which is inclined at an angle of 45 degrees with respect to the (100) direction or (010) direction of the c-axis oriented superconductors.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: January 18, 2000
    Assignees: International Superconductivity Technology Center, Sharp Kabushiki Kaisha
    Inventors: Yuuji Mizuno, Yoshihiro Ishimaru, Youichi Enomoto
  • Patent number: 6011981
    Abstract: An oxide superconducting multilayered thin film structure having a laminated layer structure of oxide superconductor thin film layers and non-superconductor thin film layers constituted by a combination of material groups for making strain free interfaces among both thin film layers. For example, an oxide superconductor multilayered film constituted by a laminated layer structure where thin films of an oxide superconductor represented by the chemical formula of M'Ba.sub.2 Cu.sub.3 O.sub.7-.delta. (M'; a rare earth element of Nd, Sm, Eu or the like or an alloy of these, .delta.; oxygen depletion amount) and thin films of an oxide represented by the chemical formula of M*Ba.sub.2 Cu.sub.3 O.sub.7-.delta. (M*; an element of Pr, Sc or the like or an alloy of these, .delta.; oxygen depletion amount) are alternately stacked. The oxide thin films are thin films fabricated by a pulsed laser deposition process or a sputtering process. A Josephson device can be provided by using the multilayered film.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: January 4, 2000
    Assignee: International Superconductivity Technology Center
    Inventors: Gustavo Alvarez, Furen Wang, Jian-Guo Wen, Naoki Koshizuka, Youichi Enomoto, Tadashi Utagawa, Shoji Tanaka
  • Patent number: 6008162
    Abstract: The present invention can provide an oxide superconductive film with a smooth surface and at homogeneous thickness on a simple substrate structure at a high film formation rate. In a liquid phase epitaxial growth method for producing an ReBa.sub.2 Cu.sub.3 Ox film (3) (Rerepresents one selected from lanthanoids such as Y and Nd, and X represents the oxygen amount) having a 123 type crystal structure from a molten liquid (1), a substrate (2) surface is inclined by 1 degree to 44 degrees with respect to the molten liquid surface at the time of separating the film from the molten liquid after film formation. After separating the film from the molten liquid, the substrate is rotated at 300 rpm to 3000 rpm for 5 seconds to 5 minutes. The film formation atmosphere contains 2 at. % of oxygen and 98 at. % of nitrogen, and the film formation temperature is 900 to 970.degree. C.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: December 28, 1999
    Assignees: NEC Corporation, International Conductivity Technology Center
    Inventors: Sadahiko Miura, Tadataka Morishita, Youichi Enomoto
  • Patent number: 5925892
    Abstract: A Josephson junction element having a substrate of a single crystal having a V-shaped notch formed in a surface of the substrate and a wiring pattern of an oxide superconductor formed on the surface of the substrate and crossing the notch to form a weak link region in the pattern at a position above the notch. The notch is defined by first and second walls joining with each other at the bottom of the notch and has first and second corners at which the first and second walls meet the surface of the substrate. The first and second corners have radii of curvature of 5-50 nm and 50-500 nm, respectively, provided that the difference in radius of curvature between the first and second corners is not smaller than 10 nm. The notch is formed by obliquely irradiating a predetermined portion of the substrate with a focused ion beam.
    Type: Grant
    Filed: June 12, 1997
    Date of Patent: July 20, 1999
    Assignees: International Superconductivity Technology Center, Sharp Kabushiki Kaisha, NEC Corporation
    Inventors: Yuji Mizuno, Katsumi Suzuki, Youichi Enomoto
  • Patent number: 5920811
    Abstract: In a superconductor mixer, a non-linear element is provided on a substrate. The non-linear element comprises at least one Josephson junction connected in series. An antenna pattern of superconductor, an intermediate frequency output pattern of superconductor, and a bias current pattern of superconductor are connected to the non-linear element. A signal high frequency wave (RF) and a local reference frequency wave (LO) are received by the antenna pattern and then absorbed in the non-linear element to obtain an intermediate frequency (IF) signal. Then, with applying a current to the series connected Josephson junction in the non-linear element from the bias current pattern, the intermediate frequency (IF) signal as a frequency signal of a difference between the signal high frequency wave (RF) and the local reference frequency wave (LO) is output to the intermediate frequency output pattern.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: July 6, 1999
    Assignees: International Superconductivity Technology Center, NEC Corporation
    Inventors: Katsumi Suzuki, Youichi Enomoto, Shoji Tanaka
  • Patent number: 5904861
    Abstract: A superconductive device manufacturing method is disclosed, which can prevent the characteristic deterioration on the processed surface, reduce the number of process steps, and thereby shorten the manufacturing time. The superconductive device manufacturing method comprises the steps of: forming a YBCO film (301) on a substrate (201); forming a mask pattern (302) on the formed YBCO film (301); and etching the YBCO film (301) by use of the formed mask pattern (302) and a plasma including at least oxygen plasma.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: May 18, 1999
    Assignees: International Superconductivity Technology Center, Kawasaki Jukogyo Kabushiki Kaisha, NEC Corporation
    Inventors: Masahito Ban, Tsuyoshi Takenaka, Katsumi Suzuki, Youichi Enomoto
  • Patent number: 5885939
    Abstract: A process for forming a laminate of 123-type copper oxide superconductor thin films having dissimilar crystal axis orientations, a laminate of 123-type thin copper oxide superconductor layers exhibiting excellent superconducting property, and wiring for Josephson junction. A c-axis oriented single crystalline thin film of an oxide superconductor having a Y:Ba:Cu atomic ratio of substantially 1:2:3 and a lattice constant of 11.60 angstroms.ltoreq.c.ltoreq.11.70 angstroms at a temperature of 20.degree. C. under an oxygen partial pressure of 160 Torr is formed on a single crystalline substrate, and an a-axis oriented single crystalline thin film of said oxide superconductor is formed on the above laminated film relying upon a sputter deposition method.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: March 23, 1999
    Assignees: Kyocera Corporation, International Superconductivity Technology Center, Matsushita Electric Industrial Co., Ltd., Mitsubishi Materials Corporation
    Inventors: Yoshinori Matsunaga, Shuichi Fujino, Akihiro Odagawa, Youichi Enomoto
  • Patent number: 5883051
    Abstract: A superconducting Josephson junction element including a first, a-axis oriented, superconductive metal oxide crystal grain having a first area of a {001} plane, and a second, c-axis oriented, superconductive metal oxide crystal grain having a second area of a {110} plane, wherein the first and second crystal grains are in contact with each other at the first and second areas to form a grain boundary therebetween.
    Type: Grant
    Filed: October 22, 1996
    Date of Patent: March 16, 1999
    Assignee: International Superconductivity Technology Center
    Inventors: Yoshihiro Ishimaru, Jian-Guo Wen, Kunihiko Hayashi, Youichi Enomoto, Naoki Koshizuka, Shoji Tanaka
  • Patent number: 5877122
    Abstract: An oxide superconductor element, produced by forming a damaged region on a substrate surface by the Ga.sup.+ focusing ion beam method and then depositing an oxide superconductor thin-film over it, is characterized in that a NdBa.sub.2 Cu.sub.3 O.sub.7-y (0.ltoreq.y.ltoreq.0.5) oxide superconductor is used in a tunnel junction having a tunneling barrier region with weak superconductivity.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: March 2, 1999
    Assignees: Fujitsu Ltd., Sharp Kabushiki Kaisha, NEC Corp., International Superconductivity Technology Center
    Inventors: Yoshihiro Ishimaru, Yuuji Mizuno, Katsumi Suzuki, Youichi Enomoto, Shoji Tanaka
  • Patent number: 5834794
    Abstract: Disclosed is a superconducting device comprising a logic SQUID and a readout SQUID magnetically coupled with the logic SQUID, which are fabricated using a single layer of an oxide high-temperature superconductor, wherein the logic SQUID comprising a superconducting loop constituted by a first superconducting line, a second superconducting line arranged to be parallel to the first superconducting line, third and fourth superconducting lines provided to connect the first and second superconducting lines, and two Josephson junctions formed in the third and fourth superconducting lines, and widths W.sub.1 and W.sub.2 of the first and second superconducting lines are larger than a distance d between them, the width W.sub.2 is larger than the width W.sub.1, and the widths W.sub.1 and W.sub.2 are larger than the widths W.sub.3 and W.sub.4 of the third and fourth superconducting lines.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: November 10, 1998
    Assignees: Kabushiki Kaisha Toshiba, International Superconductivity Technology Center
    Inventors: Hiroyuki Fuke, Kazuo Saitoh, Youichi Enomoto