Patents by Inventor Youichi Matsumoto

Youichi Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030040442
    Abstract: The invention aims to provide a rolling bearing that secures a sufficient bearing life economically even when used under such conditions that water from the outside or water formed by moisture condensation may seep into the lubricant or the bearing is affected by the vibrations, and particularly a rolling bearing suited to the electric parts and accessaries of au automobile engine, such as an alternator. To accomplish the object, the hydrogen ion exponent pH of the grease sealed into the inside of the bearing is adjusted in a range of from 7 to 13. For the same purpose, the hydrogen ion exponent pH of the grease is adjusted in a range of from 5 to 13 where a prescribed amount of an organic metal salt or ADTC is added to the grease, where a prescribed amount of an inorganic compound having an average particle size of 2 □m or smaller is added to the grease, or where a diurea compound containing an aromatic amine or a mixture of the diurea compound is added to the grease as a thickener.
    Type: Application
    Filed: March 7, 2002
    Publication date: February 27, 2003
    Applicant: NSK LTD.
    Inventors: Atsushi Yokouchi, Youichi Matsumoto, Kenichi Iso, Kouichi Hachiya, Hideki Koizumi, Michiharu Naka
  • Patent number: 4991442
    Abstract: A method and an apparatus for detecting a crack in a bearing including a stationary element, a moving element, and a plurality of rolling elements disposed between the stationary element and the moving element. A crack sensor detects a signal characteristic of a crack in the bearing. A rolling element position sensor detects a position of the rolling elements. A moving element position sensor detects a position of the moving element. When an output signal from the crack sensor is supplied for the first time, based on at least one of position signals respectively supplied from the rolling element position sensor and the moving element position sensor, there is determined a condition of the at least one of position signals to be satisfied when the output signal from the crack sensor is supplied the next time.
    Type: Grant
    Filed: December 14, 1989
    Date of Patent: February 12, 1991
    Assignee: Nippon Seiko Kabushiki Kaisha
    Inventor: Youichi Matsumoto
  • Patent number: 4939386
    Abstract: Disclosed in an N-type MISFET having the LDD structure in which the short-channel effect is reduced by employing arsenic, which has a smaller diffusion coefficient value than that of phosphorus, to form low- and high-impurity concentration regions which constitute in combination source and drain regions of the MISFET.
    Type: Grant
    Filed: November 4, 1987
    Date of Patent: July 3, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Ryuuji Shibata, Ken Uchida, Toshifumi Takeda, Youichi Matsumoto
  • Patent number: 4930909
    Abstract: A rolling bearing having an inner ring, outer ring and rolling element, at least one of these elements being made of one of the following first, second or third medium-carbon manganese steels. The first medium-carbon manganese steel includes C: 0.4 to 0.7 wt. %, Si: 0.15 to 1.2 wt. %, Mn: 1.2 to 1.7 wt. %, Al: 200 to 300 ppm, Ti: up to 40 ppm, N: 100 to 200 ppm, S: up to 80 ppm, O: 9 ppm and the balance of Fe. The second steel includes at least one of Nb: 0.03 to 0.08 wt. % and V: 0.1 to 0.15 wt. % in addition to the elements of the first medium-carbon manganese steel. The third medium-carbon manganese steel includes at least one of Nb: 0.03 to 0.08 wt. % and V: 0.1 to 0.15 wt. % instead of Al and N and includes the other elements of the first medium-carbon manganese steel. Each medium-carbon manganese steel is subject to carburizing or carbo-nitriding so as to include a case with a 25 to 45 vol. % retained austenite.
    Type: Grant
    Filed: July 7, 1989
    Date of Patent: June 5, 1990
    Assignee: Nippon Seiko Kabushiki Kaisha
    Inventors: Yasuo Murakami, Youichi Matsumoto, Kazuhiro Uemura
  • Patent number: 4912674
    Abstract: A mask-programmed ROM includes depletion type load MOSFETs provided between data lines in a memory array and a power supply voltage, the MOSFETs having a ground potential of the circuit applied to their gates. Reading of data is carried out by an amplifying MOSFET which supplies a current to a selected data line through a depletion type MOSFET which is supplied at its gate with the circuit ground potential. Thus, bias voltages which are respectively applied to the data lines and a sense amplifier which receives a signal read out from a selected data line are made equal to each other, thereby achieving a high-speed read operation.
    Type: Grant
    Filed: February 14, 1989
    Date of Patent: March 27, 1990
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Youichi Matsumoto, Ryuuji Shibata, Isamu Kobayashi, Satoshi Meguro, Kouichi Nagasawa, Hideo Meguro, Hisahiro Moriuchi, Masahiro Ogata, Kikuo Sakai, Toshifumi Takeda
  • Patent number: 4904094
    Abstract: A rolling bearing, comprising an inner race, an outer race and rolling members which roll therebetween, at least one of the inner and outer races being subjected to carburizing and heating treatment, is characterized in that:the one race comprises a carbon steel containing 0.1 to 0.7 wt. % of carbon, with the residual austenite content on the track surface layer being 20 to 45 vol. % and the rolling members comprise a carbon steel containing 0.7 to 1.1 wt. % of carbon having carbonitriding and heating treatment applied on the surface layer, with the residual austenite content in such surface layer being 20 to 45 vol. % and the carbonitride in such surface being 3 to 15 vol. %.In another form of the bearing, the rolling members may comprise a carbon steel containing 0.1 to 0.7 wt. % of carbon, with the surface layers thereof being subjected to carburizing and heating treatment and having a residual austenite content of 20 to 45 vol. %.
    Type: Grant
    Filed: July 29, 1988
    Date of Patent: February 27, 1990
    Assignee: Nippon Seiko Kabushiki Kaisha
    Inventors: Kyozaburo Furumura, Yasuo Murakami, Youichi Matsumoto, Kenji Takei, Takaaki Shiratani, Soji Nishida
  • Patent number: 4805143
    Abstract: A mask-programmed ROM includes depletion type load MOSFETs provided between data lines in a memory array and a power supply voltage, the MOSFETs having a ground potential of the circuit applied to their gates. Reading of data is carried out by an amplifying MOSFET which supplies a current to a selected data line through a depletion type MOSFET which is supplied at its gate with the circuit ground potential. Thus, bias voltages which are respectively applied to the data lines and a sense amplifier which receives a signal read out from a selected data line are made equal to each other, thereby achieving a high-speed read operation.
    Type: Grant
    Filed: January 12, 1987
    Date of Patent: February 14, 1989
    Assignees: Hitachi Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Youichi Matsumoto, Ryuuji Shibata, Isamu Kobayashi, Satoshi Meguro, Kouichi Nagasawa, Hideo Meguro, Hisahiro Moriuchi, Masahiro Ogata, Kikuo Sakai, Toshifumi Takeda
  • Patent number: 4338574
    Abstract: The voltage controlled oscillator (VCO) in a phase-locked loop carrier recovery circuit is provided with two control signals, one based upon a phase error between the phase modulated carrier and VCO output and the other based upon a frequency error between the phase modulated carrier and VCO output.
    Type: Grant
    Filed: March 26, 1980
    Date of Patent: July 6, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Toshio Fujita, Youichi Matsumoto, Yoshimi Tagashira
  • Patent number: 4121166
    Abstract: A phase synchronizing circuit for the demodulation of multi-phase PSK signals has a broadened capture frequency range while avoiding false capture. The circuit includes a phase synchronizing loop having a voltage controlled oscillator for generating a variable frequency output in response to a control voltage and a phase comparator for providing a comparison output representative of the phase difference between the output of the voltage controlled oscillator and an input signal. The comparison output serves as the control voltage for the voltage controlled oscillator. A phase-lock detection circuit is connected to the phase synchronizing loop to detect the phase-synchronized or unsynchronized states of the loop. A low frequency sweep generator is responsive to the phase-lock detection circuit for generating a variable-amplitude voltage which is supplied as a frequency sweep voltage to the voltage controlled oscillator.
    Type: Grant
    Filed: November 11, 1977
    Date of Patent: October 17, 1978
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Youichi Matsumoto, Yoshimi Tagashira
  • Patent number: 4110706
    Abstract: A synchronizing circuit for reproducing a synchronizing carrier wave from a received N-phase (N=2.sup.n, n being a positive real integer where n .gtoreq.1) PSK modulated carrier wave and employing a code converter circuit for adjusting the phase states of the received modulated carrier after demodulation thereof in order to enable the modulator to generate signals of the proper phase relation relative to an output carrier wave of a voltage controlled oscillator, which phase relationship is detected by a phase detector.The code converter may be a logic gating circuit having control inputs for changing the output levels or a plurality of branching circuit pairs for each input each pair having a true and complement branch, and switch means for selectively coupling one of the branches to an output associated with each pair of branch circuits.
    Type: Grant
    Filed: October 6, 1976
    Date of Patent: August 29, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Youichi Matsumoto, Yoshimi Tagashira, Seijiro Yokoyama
  • Patent number: 3978406
    Abstract: A code error detection system in a digital phase modulation communication system comprises on the transmitter side a first code train generator for generating a pseudo-random code train and a second code train generator for generating codes which are complementary to each other at n-bit intervals. A 4-phase phase modulator is driven by another code representative of the exclusive OR function of the pseudo-random and complementary codes.
    Type: Grant
    Filed: August 11, 1975
    Date of Patent: August 31, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Youichi Matsumoto, Seijiro Yokoyama, Tadao Shimamura