Abstract: A cylindrical pressure-receiving member 34b is arranged in a space between a ring-shaped clamp sleeve 34a and a frame 31b such that the clamp sleeve 34a is fitted around a shaft 38b being integral with a rotary shaft 39. In an outer peripheral portion 34a2 of the clamp sleeve 34a, an annular groove 34a1 provided continuously over the entire circumference within an axial area of the outer peripheral portion 34a2 fitted into an inner peripheral portion 34b3 of the pressure-receiving member 34b provides a thin-wall portion 34a5. Also, a space surrounded by the annular groove 34a5 and the pressure-receiving member 34b provides a pressure chamber 34d communicating with a fluid control circuit. A predetermined gap 34d2 is provided between an inner peripheral surface 31b4 of the through hole 31b1 of the frame and an outer peripheral surface 34b2 of the pressure-receiving member 34b.

Abstract: A cylindrical pressure-receiving member 34b is arranged in a space between a ring-shaped clamp sleeve 34a and a frame 31b such that the clamp sleeve 34a is fitted around a shaft 38b being integral with a rotary shaft 39. In an outer peripheral portion 34a2 of the clamp sleeve 34a, an annular groove 34a1 provided continuously over the entire circumference within an axial area of the outer peripheral portion 34a2 fitted into an inner peripheral portion 34b3 of the pressure-receiving member 34b provides a thin-wall portion 34a5. Also, a space surrounded by the annular groove 34a5 and the pressure-receiving member 34b provides a pressure chamber 34d communicating with a fluid control circuit. A predetermined gap 34d2 is provided between an inner peripheral surface 31b4 of the through hole 31b1 of the frame and an outer peripheral surface 34b2 of the pressure-receiving member 34b.

Abstract: A clamping device for holding an indexed angular position of a main shaft includes a clamp section non-rotatable relative to the main shaft, and a pressing mechanism including a clamp piston displaceable in an axial direction of the main shaft and causing a fluid pressure received by the clamp piston to act on the clamp section. The clamp section includes a first clamp portion being non-rotatable relative to the main shaft, and a second clamp portion being rotatable with the main shaft. The pressing mechanism includes first and second pressing portions which respectively press the first and second clamp portions. The second clamp portion or the second pressing portion is elastically displaced when the clamp piston advances by the fluid pressure. Forces in axial and radial directions are respectively applied to the first and second clamp portions, thereby clamping the main shaft.

Abstract: A semiconductor device (100) comprises a processor unit (110) including an internal CPU (113), an internal interface section (130), an external interface section (140) including an interface unit (143) connected to an external CPU (201), a plurality of processing circuits (121)-(126), and a connection control circuit (180). The internal interface section (130) includes a first bus (191) connected to the internal CPU (113), a second bus (192) connected to the external CPU (201) through the interface unit (143), and selecting circuits (131)-(136), controlled by the connection control circuit (180) according to the instruction of the internal CPU (113) or the external CPU (201), and operable to select respective connections of the plurality of processing circuits (121)-(126) to the first bus (191) or to the second bus (192). All the processing circuits (121)-(126) are controllable by the internal CPU (113) and the external CPU (201).

Abstract: An image processing unit decodes coded data that have been coded and synthesizes the decoded moving image with graphics data. In a case where only graphics data are to be displayed, a bypass unit outputs the graphics data to a display device without use of an image processing unit. A control unit performs control of the supplying of a power supply voltage and a clock to a region containing the image processing unit and performs control of the bypass unit. If processing at the image processing unit is unnecessary, the supply of a power supply voltage or the supply of a clock to the region containing the image processing unit is stopped so as to stop the region and enable reduction of wasteful power consumption.

Abstract: A slot allotment period register stores a slot allotment period specified in terms of the predetermined number of slots. A reserved-slot register stores a reserved-slot-number allotted in advance to VCE which performs a real-time processing. The reserved-slot register also stores a reserved-slot number allotted in advance to ACE which performs a real-time processing. A remaining-reserved-slot register stores the result of subtracting the reserved-slot numbers of the VCE and the ACE from the slot allotment period. It is possible to judge beforehand whether the processing to be performed will fail or not due to the shortage of slot number, by externally monitoring the remaining-reserved-slot register.

Abstract: An image processing unit decodes coded data that have been coded and synthesizes the decoded moving image with graphics data. In a case where only graphics data are to be displayed, a bypass unit outputs the graphics data to a display device without use of an image processing unit. A control unit performs control of the supplying of a power supply voltage and a clock to a region containing the image processing unit and control of the bypass unit. If processing at the image processing unit is unnecessary, the supply of power supply voltage or the supply of clock to the region containing the image processing unit is stopped to stop the region and enable reduction of wasteful power consumption.

Abstract: A current sense amplifier circuit is provided with a reference current generator for generating a reference current according to the characteristics of a memory cell, and a current comparator, and the current comparator compares the memory cell current with the reference current. Thereby, the range of the operating power supply voltage is increased. Further, a current sense amplifier circuit is provided with plural sets of reference current generators and current comparators, and the reference current generators generate reference currents of different amounts corresponding to plural states the memory cell can take, and the current comparators compare the respective reference currents with the memory cell current. Therefore, it is possible to detect the current in the memory cell that is set in multiple states.

Abstract: A current sense amplifier circuit is provided with a reference current generator for generating a reference current according to the characteristics of a memory cell, and a current comparator, and the current comparator compares the memory cell current with the reference current. Thereby, the range of the operating power supply voltage is increased. Further, a current sense amplifier circuit is provided with plural sets of reference current generators and current comparators, and the reference current generators generate reference currents of different amounts corresponding to plural states the memory cell can take, and the current comparators compare the respective reference currents with the memory cell current. Therefore, it is possible to detect the current in the memory cell that is set in multiple states.

Abstract: A current sense amplifier circuit is provided with a reference current generator for generating a reference current according to the characteristics of a memory cell, and a current comparator, and the current comparator compares the memory cell current with the reference current. Thereby, the range of the operating power supply voltage is increased. Further, a current sense amplifier circuit is provided with plural sets of reference current generators and current comparators, and the reference current generators generate reference currents of different amounts corresponding to plural states the memory cell can take, and the current comparators compare the respective reference currents with the memory cell current. Therefore, it is possible to detect the current in the memory cell that is set in multiple states.

Abstract: A current sense amplifier circuit is provided with a reference current generator for generating a reference current according to the characteristics of a memory cell, and a current comparator, and the current comparator compares the memory cell current with the reference current. Thereby, the range of the operating power supply voltage is increased. Further, a current sense amplifier circuit is provided with plural sets of reference current generators and current comparators, and the reference current generators generate reference currents of different amounts corresponding to plural states the memory cell can take, and the current comparators compare the respective reference currents with the memory cell current. Therefore, it is possible to detect the current in the memory cell that is set in multiple states.

Abstract: The present invention provides a semiconductor memory which can reduce the area of a circuit for replacing defective memory cells with redundant memory cells as well as reduce the time for writing defect information.

Abstract: A semiconductor integrated circuit includes a booster for boosting a power supply voltage, and outputting the boosted voltage; an output circuit being supplied with the boosted voltage, and generating an output voltage from the boosted voltage; a reference voltage generator being supplied with the power supply voltage, and generating a reference voltage from the power supply voltage; a voltage divider being supplied with the output voltage from the output circuit, and dividing the output voltage with a predetermined voltage ratio; and a differential amplifier being supplied with the reference voltage and the divided voltage, and controlling the output circuit by supplying the output circuit with a voltage obtained by performing differential amplification on the reference voltage and the divided voltage according to the power supply voltage, thereby maintaining the output voltage from the output circuit at a predetermined voltage.