Patents by Inventor Youjip Won
Youjip Won has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250363059Abstract: The present disclosure relates to a method and a device for updating a dual-order-guaranteed mapping table. The present invention can: detect a write command indicating order constraints on write requests for two streams; generate a mapping table for epochs of streams detected from the write command; and record the streams in a storage according to the order constraints while updating the mapping table through mapping information about each epoch in the streams by using the mapping table.Type: ApplicationFiled: August 4, 2025Publication date: November 27, 2025Applicant: Korea Advanced Institute of Science And TechnologyInventors: Youjip Won, Jieun Kim
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Publication number: 20250355598Abstract: The present disclosure relates to a method and apparatus for double-writing based on write-ahead, which may be configured to: classify write requests for different streams into write-ahead and write-behind on the basis of sequence constraints; transform write-ahead into double-writing for the streams; and log the streams in compliance with the sequence constraints on the basis of the double-writing.Type: ApplicationFiled: August 5, 2025Publication date: November 20, 2025Applicant: Korea Advanced Institute of Science and TechnologyInventors: Youjip Won, Jieun Kim
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Patent number: 12443345Abstract: A multi-level data storage device includes a first storage device; a second storage device located at a lower level than the first storage device; an input/output (I/O) control circuit configured to control a first write operation for the first storage device and a second write operation for the second storage device; and an imbalance control circuit configured to calculate an imbalance index corresponding to a write set that is generated when a sum of a number of first write operations and a number of the second write operations becomes a predetermined number, and configured to control the I/O control circuit to control imbalance of write operations performed in the multi-level data storage device by controlling the first write operation or the second write operation based on the imbalance index.Type: GrantFiled: August 22, 2023Date of Patent: October 14, 2025Assignees: SK hynix Inc., Korea Advanced Institute of Science and TechnologyInventors: Kyoungho Koo, Youjip Won
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Patent number: 12346223Abstract: Disclosed is a multiple file transaction method comprising: a first step in which, for each of a plurality of files, a file system of a host stores, in a master commit block, the location of an inode block in a storage, the inode block being a block in which an inode of the file is written; and a second step in which the file system stores the master commit block in the storage.Type: GrantFiled: November 29, 2021Date of Patent: July 1, 2025Assignee: Korea Advanced Institute of Science and TechnologyInventors: Youjip Won, Joontaek Oh
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Patent number: 12248707Abstract: Disclosed is a write method comprising a step in which a storage device determines an execution order between received first and second write commands, and executes the first write command and the second write command according to the determined execution order. The first write command comprises first stream identification information having {first stream ID, first epoch ID}, the second write command comprises second stream identification information having {second stream ID, second epoch ID}, and when the first stream ID and the second stream ID are different from each other, the execution order is determined without using the result of comparison between the first epoch ID and the second epoch ID.Type: GrantFiled: November 29, 2021Date of Patent: March 11, 2025Assignee: Korea Advanced Institute of Science and TechnologyInventors: Youjip Won, Jieun Kim
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Publication number: 20240192853Abstract: A multi-level data storage device includes a first storage device; a second storage device located at a lower level than the first storage device; an input/output (I/O) control circuit configured to control a first write operation for the first storage device and a second write operation for the second storage device; and an imbalance control circuit configured to calculate an imbalance index corresponding to a write set that is generated when a sum of a number of first write operations and a number of the second write operations becomes a predetermined number, and configured to control the I/O control circuit to control imbalance of write operations performed in the multi-level data storage device by controlling the first write operation or the second write operation based on the imbalance index.Type: ApplicationFiled: August 22, 2023Publication date: June 13, 2024Inventors: Kyoungho KOO, Youjip WON
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Publication number: 20240193052Abstract: Disclosed is a multiple file transaction method comprising: a first step in which, for each of a plurality of files, a file system of a host stores, in a master commit block, the location of an inode block in a storage, the inode block being a block in which an inode of the file is written; and a second step in which the file system stores the master commit block in the storage.Type: ApplicationFiled: November 29, 2021Publication date: June 13, 2024Applicant: Korea Advanced Institute of Science and TechnologyInventors: Youjip Won, Joontaek Oh
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Patent number: 11947843Abstract: Provided is a method of controlling a RAID controller, the method including generating, by the RAID controller, a command sequence, and transmitting, by the RAID controller, when a first cache barrier command included in the command sequence is identified, at least one cache barrier command to an arbitrary disk constituting a RAID before transmitting a first write command arranged after the first cache barrier command in the command sequence to the arbitrary disk.Type: GrantFiled: November 26, 2020Date of Patent: April 2, 2024Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventor: Youjip Won
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Publication number: 20240094954Abstract: Disclosed is a write method comprising a step in which a storage device determines an execution order between received first and second write commands, and executes the first write command and the second write command according to the determined execution order. The first write command comprises first stream identification information having {first stream ID, first epoch ID}, the second write command comprises second stream identification information having {second stream ID, second epoch ID}, and when the first stream ID and the second stream ID are different from each other, the execution order is determined without using the result of comparison between the first epoch ID and the second epoch ID.Type: ApplicationFiled: November 29, 2021Publication date: March 21, 2024Applicant: Korea Advanced Institute of Science and TechnologyInventors: Youjip Won, Jieun Kim
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Publication number: 20220188044Abstract: Provided is a method of controlling a RAID controller, the method including generating, by the RAID controller, a command sequence, and transmitting, by the RAID controller, when a first cache barrier command included in the command sequence is identified, at least one cache barrier command to an arbitrary disk constituting a RAID before transmitting a first write command arranged after the first cache barrier command in the command sequence to the arbitrary disk.Type: ApplicationFiled: November 26, 2020Publication date: June 16, 2022Inventor: Youjip WON
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Patent number: 9841995Abstract: Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a Central Processing Unit (CPU) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the CPU effectiveness.Type: GrantFiled: July 30, 2014Date of Patent: December 12, 2017Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)Inventor: Youjip Won
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Publication number: 20140337858Abstract: Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a Central Processing Unit (CPU) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the CPU effectiveness.Type: ApplicationFiled: July 30, 2014Publication date: November 13, 2014Inventor: Youjip WON
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Patent number: 8826295Abstract: Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a Central Processing Unit (CPU) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the CPU effectiveness.Type: GrantFiled: May 20, 2011Date of Patent: September 2, 2014Assignee: IUCF-HYU (Industry-University Cooperation Foundation Hangyang University)Inventor: Youjip Won
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Patent number: 8811106Abstract: Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit to delay a drop in voltage of an input/output line, a power shutdown sensor to sense power shutdown of a system, and a controller to control the signal delay unit in response to whether the system is shut down.Type: GrantFiled: April 22, 2013Date of Patent: August 19, 2014Assignee: SK Hynix Inc.Inventor: Youjip Won
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Publication number: 20130235690Abstract: Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit to delay a drop in voltage of an input/output line, a power shutdown sensor to sense power shutdown of a system, and a controller to control the signal delay unit in response to whether the system is shut down.Type: ApplicationFiled: April 22, 2013Publication date: September 12, 2013Applicant: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)Inventor: Youjip WON
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Patent number: 8446795Abstract: Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device (200) that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit (230) to delay a drop in voltage of an input/output line, a power shutdown sensor (210) to sense power shutdown of a system, and a controller (220) to control the signal delay unit in response to whether the system is shut down.Type: GrantFiled: July 31, 2009Date of Patent: May 21, 2013Assignee: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)Inventor: Youjip Won
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Publication number: 20110239225Abstract: Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a Central Processing Unit (CPU) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the CPU effectiveness.Type: ApplicationFiled: May 20, 2011Publication date: September 29, 2011Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)Inventor: Youjip Won
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Publication number: 20110141839Abstract: Disclosed is a non-volatile memory data protecting device and method. The non-volatile memory data protecting device (200) that is used for protecting non-volatile memory data when a power is shut down in a system, may include a signal delay unit (230) to delay a drop in voltage of an input/output line, a power shutdown sensor (210) to sense power shutdown of a system, and a controller (220) to control the signal delay unit in response to whether the system is shut down.Type: ApplicationFiled: July 31, 2009Publication date: June 16, 2011Inventor: Youjip Won
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Patent number: 7100057Abstract: A method and device for retrieving data in low-power is provided. More specifically, it relates to a method and device for minimizing power consumption while retrieving the continuous media data from a disk drive for the purpose of real-time playback. The data reproducing device reproduces multimedia data by a determined playback strategy after it computes power consumption values according to various playback strategies and retrieves data from a storage medium by a playback strategy having the least power consumption by means of comparing respective power consumption values.Type: GrantFiled: April 24, 2003Date of Patent: August 29, 2006Assignee: Hanyang Hak Won Co. Ltd.Inventors: Youjip Won, Jungwan Choi
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Publication number: 20040081045Abstract: A method and device for retrieving data in low-power is provided. More specifically, it relates to a method and device for minimizing power consumption while retrieving the continuous media data from a disk drive for the purpose of real-time playback. The data reproducing device reproduces multimedia data by a determined playback strategy after it computes power consumption values according to various playback strategies and retrieves data from a storage medium by a playback strategy having the least power consumption by means of comparing respective power consumption values.Type: ApplicationFiled: April 24, 2003Publication date: April 29, 2004Inventors: Youjip Won, Jungwan Choi