Abstract: A non-volatile semiconductor memory includes a memory array, a selecting device selecting a page according to addresses, a data storage device, storing page data, and an output device outputting the stored data. The data storage device includes a first data storage device receiving data from a selected page of the memory array, a second data storage device receiving data from the first data storage device, and a data transmission device configured between the first and the second data storage device. The data transmission device transmits data in a second part of the first data storage device to the second data storage device when data in a first part of the second data storage device is output, and transmits data in a first part of the first data storage device to the second data storage device when data in a second part of the second data storage device is output.

Abstract: A non-volatile semiconductor memory includes a memory array, a selecting device selecting a page according to addresses, a data storage device, storing page data, and an output device outputting the stored data. The data storage device includes a first data storage device receiving data from a selected page of the memory array, a second data storage device receiving data from the first data storage device, and a data transmission device configured between the first and the second data storage device. The data transmission device transmits data in a second part of the first data storage device to the second data storage device when data in a first part of the second data storage device is output, and transmits data in a first part of the first data storage device to the second data storage device when data in a second part of the second data storage device is output.

Abstract: A circuit for generating an address of a semiconductor memory device which improves usage yield of the semiconductor memory device. The memory device includes circuitry to detect errors of various sections of a memory chip. After detecting the error-prone sections, the remainder of the memory chip can be used instead of discarding the entire memory device.

Abstract: A circuit for generating an address of a semiconductor memory device which improves usage yield of the semiconductor memory device. The memory device includes circuitry to detect errors of various sections of a memory chip. After detecting the error-prone sections, the remainder of the memory chip can be used instead of discarding the entire memory device.

Abstract: A substrate voltage generator for a semiconductor device that prevents a substrate voltage from being generated at an abnormal level which is too low or high. Control of an oscillator and a pumping circuit which is operated according to an output supplied from the oscillator is performed, and a substrate voltage value is monitored during a plurality of time periods until the substrate voltage reaches the desired level for each time period. Each time period is set by one of a plurality of delay units during a power-up interval. When substrate voltage at an extreme level is detected within a particular time period, a control signal for activating the oscillator is no longer supplied until the next time period.

Abstract: A start-up circuit for a reference voltage generator which restarts a reference voltage generating circuit when a reference voltage drops below a predetermined level due to noises or change of a power supply voltage. The start-up circuit according to the present invention includes a reference voltage generating unit operated by an input signal and generating a reference voltage in accordance with a power supply voltage, a reference voltage sensing unit determining whether an output signal from the reference voltage generating unit is lower than a predetermined voltage level, and a start-up circuit unit determining an initial operation of the reference voltage generating unit in accordance with a reset signal and supplying the input signal to restart the reference voltage generating unit in accordance with an output signal from the reference voltage sensing unit.

Abstract: An improved substrate voltage (VBB) generation circuit is disclosed. The circuit reduces variations in VBB (.DELTA.VBB) caused by variations (.DELTA.VCC) in a system voltage (VCC) by making a threshold voltage (Vt) of a logic element, e.g., an inverter of in a buffer, more sensitive to .DELTA.VCC. In contrast, the conventional art had attempted to reduce .DELTA.VBB by making the Vt of the logic element less sensitive to .DELTA.VCC. Two features of the improved logic element of the circuit contribute to the reduction of .DELTA.VBB. These features are: adopting an opposite channel ratio arrangement versus the conventional art; and incorporating additional active resistors.

Abstract: An improved current detection start-up circuit for a reference voltage circuit which restarts a reference voltage circuit when a reference voltage drops by a predetermined level, i.e., turns off, due to noise or a variation of a system voltage. The circuit includes: a current detection circuit for detecting the current being applied to a reference voltage circuit; and a start-up circuit for starting the reference voltage circuit when the current detected by the current detection circuit is below a predetermined level.