Patents by Inventor Youn-Sub Lim

Youn-Sub Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140353469
    Abstract: The present technology provides a semiconductor device that includes a substrate including an active region and an device isolation region, a plurality of micro insulation structures formed in the substrate of the device isolation region and spaced from each other, and an impurity region suitable for filling spaces between the micro insulation structures and for surrounding the micro insulation structures in the substrate of the device isolation region, and a method of fabricating the semiconductor device by improving a method of forming device isolation regions that insulate active regions. In particular, discontinuous micro insulation structures are suggested.
    Type: Application
    Filed: October 17, 2013
    Publication date: December 4, 2014
    Applicant: SK hynix Inc.
    Inventors: Do-Hyung KIM, Jang-Won MOON, Youn-Sub LIM, Do-Hwan KIM
  • Patent number: 8878266
    Abstract: A CMOS image sensor includes a substrate, a gate electrode formed over the substrate, a photodiode formed over the substrate to be substantially aligned with one side of the gate electrode, a floating diffusion region formed over the substrate to be substantially aligned with the other side of the gate electrode, and a blooming pass region formed below the photodiode.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: November 4, 2014
    Assignee: SK Hynix Inc.
    Inventor: Youn-Sub Lim
  • Patent number: 8828775
    Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: September 9, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Patent number: 8796799
    Abstract: An image sensor includes: a substrate having a plurality of unit pixel region; a light receiving element formed in the substrate at the unit pixel region; an interlayer dielectric layer formed over the substrate; a lightguide formed in the interlayer dielectric layer for the light receiving element; a light focusing pattern formed over the interlayer dielectric layer at the pixel region; a planarization layer formed over the substrate and covering the light focusing pattern; and a lens formed over the planarization layer at the pixel region.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: August 5, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventor: Youn-Sub Lim
  • Publication number: 20140159184
    Abstract: An image sensor includes a substrate including a plurality of unit pixel regions, a color filter formed over the substrate so as to correspond to each of the unit pixel regions, and a light absorption unit formed in the substrate under the color filter.
    Type: Application
    Filed: March 14, 2013
    Publication date: June 12, 2014
    Applicant: SK HYNIX INC.
    Inventor: Youn-Sub LIM
  • Patent number: 8748955
    Abstract: A CMOS image sensor includes a substrate, a punch-through prevention layer formed over the substrate, an epitaxial layer formed over the punch-through prevention layer, a gate electrode formed over the epitaxial layer; a photodiode formed in the epitaxial layer to be substantially aligned with one side of the gate electrode, a floating diffusion region formed in the epitaxial layer to be substantially aligned with the other side of the gate electrode, and an extended photodiode region formed below the photodiode to be coupled with the punch-through prevention layer.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: June 10, 2014
    Assignee: SK Hynix Inc.
    Inventor: Youn-Sub Lim
  • Patent number: 8679890
    Abstract: A method includes: forming a transfer gate on a semiconductor substrate; forming a first ion implantation region on a first side of the transfer gate; forming a second ion implantation region on the first side of the transfer gate such that the second ion implantation region encloses the first ion implantation region; forming a third ion implantation region along a surface of the semiconductor substrate; and forming a floating diffusion region at a second side of the transfer gate.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 25, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Publication number: 20140008708
    Abstract: A CMOS image sensor includes a substrate, a gate electrode formed over the substrate, a photodiode formed over the substrate to be substantially aligned with one side of the gate electrode, a floating diffusion region formed over the substrate to be substantially aligned with the other side of the gate electrode, and a blooming pass region formed below the photodiode.
    Type: Application
    Filed: August 30, 2012
    Publication date: January 9, 2014
    Inventor: Youn-Sub LIM
  • Publication number: 20140008709
    Abstract: A CMOS image sensor includes a substrate, a punch-through prevention layer formed over the substrate, an epitaxial layer formed over the punch-through prevention layer, a gate electrode formed over the epitaxial layer; a photodiode formed in the epitaxial layer to be substantially aligned with one side of the gate electrode, a floating diffusion region formed in the epitaxial layer to be substantially aligned with the other side of the gate electrode, and an extended photodiode region formed below the photodiode to be coupled with the punch-through prevention layer.
    Type: Application
    Filed: August 30, 2012
    Publication date: January 9, 2014
    Inventor: Youn-Sub LIM
  • Patent number: 8541825
    Abstract: An image sensor includes: a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a first depth from a surface portion of the semiconductor layer; a first spacer formed on each sidewall of the gate structure; a second impurity region of the first conductive type, aligned with the first spacer and extending to a second depth that is larger than the first depth from the surface portion of the semiconductor layer; a second spacer formed on each sidewall of the first spacer; a third impurity region of the first conductive type aligned with the second spacer and extending to a third depth that is larger than the second depth from the surface portion of the semiconductor layer; and a fourth impurity region of a second conductive type beneath the third impurity region.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: September 24, 2013
    Assignee: Intellectual Ventures II LLC
    Inventors: Jae-Young Park, Youn-Sub Lim
  • Publication number: 20120273907
    Abstract: An image sensor includes: a substrate having a plurality of unit pixel region; a light receiving element formed in the substrate at the unit pixel region; an interlayer dielectric layer formed over the substrate; a lightguide formed in the interlayer dielectric layer for the light receiving element; a light focusing pattern formed over the interlayer dielectric layer at the pixel region; a planarization layer formed over the substrate and covering the light focusing pattern; and a lens formed over the planarization layer at the pixel region.
    Type: Application
    Filed: January 17, 2012
    Publication date: November 1, 2012
    Inventor: Youn-Sub LIM
  • Publication number: 20120094419
    Abstract: A method includes: forming a transfer gate on a semiconductor substrate; forming a first ion implantation region on a first side of the transfer gate; forming a second ion implantation region on the first side of the transfer gate such that the second ion implantation region encloses the first ion implantation region; forming a third ion implantation region along a surface of the semiconductor substrate; and forming a floating diffusion region at a second side of the transfer gate.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 19, 2012
    Applicant: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Publication number: 20120028394
    Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 2, 2012
    Applicants: MagnaChip Semiconductor, Ltd., CROSSTEK CAPITAL, LLC
    Inventor: Youn-Sub Lim
  • Patent number: 8044444
    Abstract: A fabricating method of a CMOS image sensor includes the steps of: forming a transfer gate on a semiconductor substrate where a device isolation layer is formed; forming a first n-type ion implantation region for a photodiode beneath a surface of the semiconductor substrate, the first n-type ion implantation region being aligned at one side of the transfer gate and having a first width and a first ion implantation depth; forming a second n-type ion implantation region aligned at one side of the transfer gate, the second n-type ion implantation region enclosing the first n-type ion implantation region and having a second width wider than the first width and a second ion implantation depth deeper than the first ion implantation depth and a second depth; forming a p-type ion implantation region between a surface of the semiconductor substrate and the first n-type ion implantation region, the p-type ion implantation region being aligned at one side of the transfer gate and partially overlapped with the first n-ty
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 25, 2011
    Assignee: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Patent number: 7999252
    Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: August 16, 2011
    Assignee: Crosstek Capital L.L.C.
    Inventor: Youn-Sub Lim
  • Patent number: 7504681
    Abstract: A complementary metal oxide semiconductor (CMOS) image sensor capable of improving photosensitivity and a signal to noise ratio and a method for fabricating the same are provided. An image sensor for embodying the colors of red, green and blue includes: a plurality of photodiodes formed on a substrate and collecting light incident to different unit pixels; a silicon oxide layer formed on the plurality of photodiodes; a silicon nitride layer formed on the silicon oxide layer, wherein the silicon nitride layer is formed in a single layer in unit pixels of green and blue and split into two layers on an upper portion of the unit pixel of red; and a plurality of microlenses formed on portions of the silicon nitride layer corresponding to the respective photodiodes.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: March 17, 2009
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventor: Youn-Sub Lim
  • Publication number: 20090026510
    Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventor: Youn-Sub Lim
  • Publication number: 20080251820
    Abstract: A fabricating method of a CMOS image sensor includes the steps of: forming a transfer gate on a semiconductor substrate where a device isolation layer is formed; forming a first n- type ion implantation region for a photodiode beneath a surface of the semiconductor substrate, the first n-type ion implantation region being aligned at one side of the transfer gate and having a first width and a first ion implantation depth; forming a second n-type ion implantation region aligned at one side of the transfer gate, the second n-type ion implantation region enclosing the first n-type ion implantation region and having a second width wider than the first width and a second ion implantation depth deeper than the first ion implantation depth and a second depth; forming a p-type ion implantation region between a surface of the semiconductor substrate and the first n-type ion implantation region, the p-type ion implantation region being aligned at one side of the transfer gate and partially overlapped with the first n-t
    Type: Application
    Filed: June 11, 2008
    Publication date: October 16, 2008
    Inventor: Youn-Sub Lim
  • Publication number: 20080197389
    Abstract: An image sensor includes: a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a first depth from a surface portion of the semiconductor layer; a first spacer formed on each sidewall of the gate structure; a second impurity region of the first conductive type, aligned with the first spacer and extending to a second depth that is larger than the first depth from the surface portion of the semiconductor layer; a second spacer formed on each sidewall of the first spacer; a third impurity region of the first conductive type aligned with the second spacer and extending to a third depth that is larger than the second depth from the surface portion of the semiconductor layer; and a fourth impurity region of a second conductive type beneath the third impurity region.
    Type: Application
    Filed: January 25, 2008
    Publication date: August 21, 2008
    Inventors: Jae-Young Park, Youn-Sub Lim
  • Patent number: 7402479
    Abstract: A fabricating method of a CMOS image sensor includes the steps of: forming a transfer gate on a semiconductor substrate where a device isolation layer is formed; forming a first n-type ion implantation region for a photodiode beneath a surface of the semiconductor substrate, the first n-type ion implantation region being aligned at one side of the transfer gate and having a first width and a first ion implantation depth; forming a second n-type ion implantation region aligned at one side of the transfer gate, the second n-type ion implantation region enclosing the first n-type ion implantation region and having a second width wider than the first width and a second ion implantation depth deeper than the first ion implantation depth and a second depth; forming a p-type ion implantation region between a surface of the semiconductor substrate and the first n-type ion implantation region, the p-type ion implantation region being aligned at one side of the transfer gate and partially overlapped with the first n-ty
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: July 22, 2008
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventor: Youn-Sub Lim