Abstract: A fuel cell apparatus of the disclosure includes a case having defined therein a first accommodation space and a second accommodation space, which are isolated from each other by a partition wall, a first cover covering the first accommodation space in the case, a second cover covering the second accommodation space in the case, a power distribution unit disposed in the first accommodation space, and a power conversion unit disposed in the second accommodation space.

Abstract: A memory module includes a memory array, an interface and a controller. The memory array includes an array of memory cells and is configured as a dual in-line memory module (DIMM). The DIMM includes a plurality of connections that have been repurposed from a standard DIMM pin out configuration to interface operational status of the memory device to a host device. The interface is coupled to the memory array and the plurality of connections of the DIMM to interface the memory array to the host device. The controller is coupled to the memory array and the interface and controls at least one of a refresh operation of the memory array, control an error-correction operation of the memory array, control a memory scrubbing operation of the memory array, and control a wear-level control operation of the array, and the controller to interface with the host device.

Abstract: This application relates to a noise signal generating apparatus. In one aspect, the apparatus includes a bandwidth expansion unit configured to generate a noise signal having a second bandwidth by expanding a noise source signal having a first bandwidth to the second bandwidth that is greater than the first bandwidth. The apparatus may also include a randomization unit configured to perform randomization and output the generated noise signal having the second bandwidth.

Abstract: Provided are apparatuses, a non-transitory computer-readable medium or media, and methods for supporting predicting of vascular disease using a fundus image of a subject. In certain aspects, disclosed a method including the steps of: extracting a feature information from a first fundus image of the subject based on a machine learning model; generating a second fundus image having a feature which is corresponding to the feature information by mapping a saliency factor to the first fundus image; and displaying the first fundus image and the second fundus image on a display device.

Abstract: Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder alloy. Metallization on the IC die and/or heat spreader may comprise a plurality of solderable structures. A multi-chip package may include multiple IC die having different die thickness that are accommodated by a z-height thickness variation in the thermal interconnects and/or the solderable structures of the IC die or heat spreader.

Abstract: A pouch type all-solid-state battery including a reference electrode is disclosed. In the all-solid-state battery, a potential variation of each electrode is accurately measured because the ion transfer path between the reference electrode and a positive electrode/negative electrode is short. Accordingly, the all-solid-state battery secures a desired cell performance while having battery specifications similar to actual battery specifications.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: A display device includes a display panel, a filler layer, a reflection control layer, a plurality of light-blocking patterns, and an encapsulation substrate. The low reflection layer is disposed on the display panel. The filler layer is disposed on the display panel. The reflection control layer includes a first catalyst and is disposed on the filler layer. The plurality of light-blocking patterns is disposed between the filler layer and the reflection control layer. The encapsulation substrate is disposed on the reflection control layer.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: Disclosed herein is an apparatus and method for synchronizing a block in a blockchain network. The apparatus synchronizes node information of existing participating nodes connected to a blockchain network by joining the blockchain network, determines synchronization target blocks by calculating the current section of a blockchain using an agreed-upon block received from the existing participating nodes, receives a block header of each section and the segment hash table of a snapshot that are verification data for verifying synchronization target data for the synchronization target blocks from participating nodes that are not connected as peers, among the existing participating nodes, generates a snapshot by receiving snapshot segments and the blocks of the current section, which are the synchronization target data, from participating nodes connected as peers, among the existing participating nodes, verifies the snapshot generated from the snapshot segments, and synchronizes the verified snapshot.

Abstract: Disclosed are an apparatus and method for electing a committee node in a blockchain. The apparatus for electing a committee node in a blockchain is configured to transmit a staking transaction including validator information to a blockchain system to register a validator node, generate a draw pool for electing a committee node based on the validator information, change entries of the draw pool using a predefined shuffling algorithm, select a preset number of top entries as votes of a committee member from among the entries of the shuffled draw pool, and elect, as the committee node, the validator node that has acquired votes of a committee.

Abstract: An example method includes estimating, based on content to be displayed at a display of a mobile computing device at a future time, an amount of power to be used by the display at the future time; selecting, based on the estimated power level, a power converter of a plurality of power converters of the mobile computing device, each of the plurality of power converters optimized for a different output power range; and causing electrical power from the selected power converter to be supplied to the display at the future time.

Abstract: Provided is a method of compressing an occupancy map of a three-dimensional (3D) point cloud, and more specifically, a method of compressing an occupancy map of a point cloud in which an occupancy map image of a point cloud existing in a 3D space is compressed based on a compression quality or a patch-by-patch inspection method of the occupancy map image so that compression distortion is minimized when reconstructing the compressed occupancy map image so as to remarkably improve the quality of a reconstructed occupancy map image.

Abstract: Disclosed herein is a method for adding an additional chain to a blockchain. The method includes depositing, by a node of the blockchain, an asset corresponding to the additional chain; selecting the node as one of consensus nodes for connecting an additional block to the additional chain based on a share value corresponding to the asset; and performing, by the node, distributed consensus for connecting the additional block. Here, nodes constituting the blockchain include major shareholder nodes for processing transactions.

Abstract: Disclosed is an encoder which receives first to third input frames included first intra period and outputs a bitstream corresponding to the third input frame. The encoder includes a motion compensation unit that generates a first reference frame corresponding to the first input frame and a second reference frame corresponding to the second input frame, a union operation unit that generates an overlap frame by performing a union operation based on the first reference frame and the second reference frame, and an inter prediction unit that generates an occupancy code by performing an inter prediction operation on the overlap frame and the third input frame. In this case, the bitstream includes the occupancy code.

Abstract: A lighting device disclosed in an embodiment of the invention includes a substrate; light sources disposed on the substrate; and a resin layer disposed on the substrate and the light sources. a first reflective layer disposed on the resin layer, wherein the resin layer includes an exit surface facing the light sources, and the exit surface of the resin layer includes convex portions facing each of the light sources and recess portions respectively disposed between the plurality of convex portions, concave surfaces disposed in each of the plurality of recess portions may have a curvature, and a radius of curvature of the concave surfaces may increase in one direction.

Abstract: PWM-frame rate misalignment is mitigated through implementation of a discrete variable refresh rate (VRR) scheme. A target frame rate is limited to a frame rate selected from only those frame rates that facilitate alignment of each frame period to a specified edge of a PWM cycle of a brightness control signal of a display panel. This alignment results in each frame period at the selected frame rate starting at a same point in a corresponding PWM cycle and ending at a same point in a corresponding PWM cycle to help ensure a constant effective duty cycle across each successive frame period, which in turn mitigates perception of flicker that otherwise would arise. Further, the discrete VRR scheme can employ a compensation mode for compensating for the delay in rendering or otherwise obtaining a frame for display so as to maintain a consistent duty cycle in the brightness control signal.

Abstract: The present disclosure relates to methods of manufacturing at least a portion of a magnetic layer of a magnetic recording disk. The methods include forming a plurality of sacrificial, discrete structures via imprint lithography. The sacrificial, discrete structures are used to form a plurality of three-dimensional segregant structures in a magnetic layer of the magnetic recording disk. The present disclosure also relates to corresponding magnetic recording disks.

Abstract: In an embodiment, an apparatus is disclosed that includes a duty cycle controller. The duty cycle controller includes a tuning circuit comprising a first field-effect transistor. The first field-effect transistor is configured to implement a capacitor. The duty cycle controller further includes an edge delay circuit. The edge delay circuit includes a second field-effect transistor that, when activated by an input clock signal of the duty cycle controller, is configured to connect a voltage source to an output clock signal of the duty cycle controller. The edge delay circuit further includes a third field-effect transistor that, when activated, is configured to connect the first field-effect transistor of the tuning circuit to the output clock signal.

Abstract: An operation method of a first access point (AP) may comprise: transmitting, to a control device of a base station, channel information between the first AP and one or more user equipments (UEs) connected to the base station; receiving allocation information determined by the control device; identifying an entity to decode a uplink (UL) signal of each of the one or more UEs from among a plurality of APs and the control device constituting the base station, based on the allocation information; directly performing a decoding operation on a first UL signal received from a first UE among the one or more UEs, based on the allocation information; and transmitting, to the control device, a first report related to a result of the decoding operation on the first UL signal.