Abstract: A semiconductor substrate having a reference semiconductor chip and a method of assembling semiconductor chips using the same are provided. According to the method, a semiconductor substrate having a plurality of semiconductor chips is provided. An identification mark is made on a reference semiconductor chip among the semiconductor chips. The semiconductor substrate is aligned with reference to the reference semiconductor chip, so that an electrical die sorting test can be performed on the semiconductor chips on the semiconductor substrate.

Abstract: A test data generator, test system and method thereof are provided. In the example method, parallel test data may be received at a first data rate. The received parallel test data may be converted into serial test data at a second data rate. Noise (e.g., jitter noise, level noise, etc.) may be selectively inserted into the converted serial test data. The noise inserted into the serial test data, which may be configured to operate at a higher data rate than the parallel test data, may allow a device to be tested with higher data-rate test data. The example method may be performed by the example test data generator and/or by the example test system.

Abstract: A digital test apparatus for testing an analog semiconductor device includes a low pass filter which passes only a low frequency analog signal from among analog signals output from the analog semiconductor device, a rectifying unit connected to the low pass filter for converting the analog signal output from the low pass filter into a DC voltage, a high pass filter which passes only a high frequency analog signal from among analog signals output from the analog semiconductor device, a high frequency power detecting unit connected to the high pass filter for converting the analog signal output from the high pass filter into a DC voltage, and a digital measuring unit which is connected to the rectifying unit and the high frequency power detecting unit and measures the DC voltages to determine whether the analog signals output from the analog semiconductor device are desirable.

Abstract: An apparatus for generating a current source test stimulus signal having a constant current regardless of an internal impedance value of a device under test includes a voltage source generation unit and a voltage to current (V/I) converter. The voltage source generation unit converts source data stored in internal memory into analog signals, and combines the analog signals and a reference signal of D/C voltage level to generate voltage source test stimulus signals. The V/I converter converts the voltage source test stimulus signals into current source test stimulus signals and outputs the current source test stimulus signal to a device under test. The V/I converter maintains the current levels of the current source test stimulus signals at a predetermined value, regardless of the internal impedance of input pins of the device under test. In this manner, the operating efficiency of the device under test can be accurately determined.

Abstract: A test data generator, test system and method thereof are provided. In the example method, parallel test data may be received at a first data rate. The received parallel test data may be converted into serial test data at a second data rate. Noise (e.g., jitter noise, level noise, etc.) may be selectively inserted into the converted serial test data. The noise inserted into the serial test data, which may be configured to operate at a higher data rate than the parallel test data, may allow a device to be tested with higher data-rate test data. The example method may be performed by the example test data generator and/or by the example test system.

Abstract: Provided are example embodiments of a test supporting device including a radio frequency (RF) line adapted to transmit an RF signal from an RF terminal to test equipment, a direct current (DC) line connected to the RF line at a first end and adapted to connect to the test equipment at a second end, and a capacitor connected to the DC line at a first end and connected to ground at a second end. Example embodiments of the present invention may also provide a test method including measuring a radio frequency (RF) signal, and measuring a direct current (DC) signal passed through an open stub.

Abstract: Provided is a probe card including: a printed circuit board comprising a ground electrode; at least one dielectric disposed below the ground electrode; and a plurality of needles, each of which comprises: a first end portion contacting a wafer pad of a semiconductor device, a second end portion electrically connected to the printed circuit board, and the remaining portion excepting the first and second end portions surrounded by the at least one dielectric. A metal plate is disposed below the at least one dielectric; and a connecting pin electrically connects the metal plate to the ground electrode and fixes the at least one dielectric and the metal plate to the printed circuit board.

Abstract: A digital test apparatus for testing an analog semiconductor device includes a low pass filter which passes only a low frequency analog signal from among analog signals output from the analog semiconductor device, a rectifying unit connected to the low pass filter for converting the analog signal output from the low pass filter into a DC voltage, a high pass filter which passes only a high frequency analog signal from among analog signals output from the analog semiconductor device, a high frequency power detecting unit connected to the high pass filter for converting the analog signal output from the high pass filter into a DC voltage, and a digital measuring unit which is connected to the rectifying unit and the high frequency power detecting unit and measures the DC voltages to determine whether the analog signals output from the analog semiconductor device are desirable.

Abstract: Provided is a probe card including: a printed circuit board comprising a ground electrode; at least one dielectric disposed below the ground electrode; and a plurality of needles, each of which comprises: a first end portion contacting a wafer pad of a semiconductor device, a second end portion electrically connected to the printed circuit board, and the remaining portion excepting the first and second end portions surrounded by the at least one dielectric. A metal plate is disposed below the at least one dielectric; and a connecting pin electrically connects the metal plate to the ground electrode and fixes the at least one dielectric and the metal plate to the printed circuit board.

Abstract: A semiconductor substrate having a reference semiconductor chip and a method of assembling semiconductor chips using the same are provided. According to the method, a semiconductor substrate having a plurality of semiconductor chips is provided. An identification mark is made on a reference semiconductor chip among the semiconductor chips. The semiconductor substrate is aligned with reference to the reference semiconductor chip, so that an electrical die sorting test can be performed on the semiconductor chips on the semiconductor substrate.

Abstract: An apparatus for generating a current source test stimulus signal having a constant current regardless of an internal impedance value of a device under test includes a voltage source generation unit and a voltage to current (V/I) converter. The voltage source generation unit converts source data stored in internal memory into analog signals, and combines the analog signals and a reference signal of D/C voltage level to generate voltage source test stimulus signals. The V/I converter converts the voltage source test stimulus signals into current source test stimulus signals and outputs the current source test stimulus signal to a device under test. The V/I converter maintains the current levels of the current source test stimulus signals at a predetermined value, regardless of the internal impedance of input pins of the device under test. In this manner, the operating efficiency of the device under test can be accurately determined.