Patents by Inventor Young-Cheol Shin
Young-Cheol Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961561Abstract: The present technology relates to an electronic device. According to the present technology, a memory device having improved verify accuracy may include a memory block including memory cells, a read and write circuit including a plurality of page buffers, a current sensing circuit configured to perform a verify operation of comparing sensing voltages with a reference voltage, and a control logic configured to control the current sensing circuit to perform the verify operation. The control logic controls performing a first verify operation on each of page buffer groups having a same logical group number, and performing a second verify operation on each of page buffer groups having a same physical group number, and the current sensing circuit outputs a verify pass signal in response to both results of the first verify operation and the second verify operation satisfying a pass criterion.Type: GrantFiled: December 21, 2021Date of Patent: April 16, 2024Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Publication number: 20240119874Abstract: Disclosed are a source driver and a method of detecting crack of a display panel. A source driver may comprise a first circuit configured to apply first data to data lines connected to sub-pixels of a display panel to charge a first driving voltage; and a second circuit formed on the display panel that applies the first driving voltage to a detection line formed on the display panel to detect the presence of cracks in the display panel based on the illumination status of the sub-pixels, wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel along its extension direction, wherein the first detection node is connected to data lines of the first and third sub-pixels, and wherein the second detection node is connected to data line of the second sub-pixel.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Applicant: LX SEMICON CO., LTD.Inventors: Byeon Cheol LEE, Seong Geon KIM, Won KIM, Tai Ming PIAO, Young Ho SHIN
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Patent number: 11908532Abstract: Provided herein is a memory device and a method of operating the memory device. The memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation for storing data in selected memory cells among the plurality of memory cells, and a control logic circuit configured to control the peripheral circuit to form threshold voltage distributions corresponding to target program states corresponding to the data to be stored in the selected memory cells, respectively, wherein the control logic controls the peripheral circuit to perform a main verify operation for any one of the target program states of the selected memory cells when a pre-verify operation for the any one of the target program states has passed.Type: GrantFiled: January 20, 2022Date of Patent: February 20, 2024Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Patent number: 11887673Abstract: The present technology relates to an electronic device. A memory device according to the present technology includes a plurality of memory cells connected to a word line, an operation controller configured to apply a first or a second read voltage to the word line and to obtain data that is stored in the plurality of memory cells through bit lines that are respectively connected to the plurality of memory cells, and a read voltage controller configured to control the operation controller to read the data that is stored in the plurality of memory cells by using the second read voltage, and to read the data that is stored in the plurality of memory cells by using the first read voltage according to the number of off cells that are counted based on the data that is read by using the second read voltage, in response to a read command.Type: GrantFiled: January 13, 2022Date of Patent: January 30, 2024Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Patent number: 11651827Abstract: A semiconductor memory device includes a memory cell array and a peripheral circuit. The memory cell array includes at least two planes. The peripheral circuit performs a memory operation on a selected plane of the at least two planes during a single plane operation and performs a dummy operation on an unselected plane of the at least two planes.Type: GrantFiled: October 7, 2022Date of Patent: May 16, 2023Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Patent number: 11600322Abstract: A semiconductor memory device includes a memory block including a plurality of memory cells programmed to a plurality of program states during a program operation, a voltage generator to generate and apply a program voltage and a select line voltage to the memory block during the program operation, and a read and write circuit to temporarily store program data during the program operation and control a potential of bit lines of the memory block based on the temporarily stored program data. The voltage generator generates the select line voltage as a first select line voltage during a first program operation on some program states among the plurality of program states, or as a second select line voltage for which a potential is lower than a potential of the first select line voltage during a second program operation on remaining program states among the plurality of program states.Type: GrantFiled: April 12, 2021Date of Patent: March 7, 2023Assignee: SK hynix Inc.Inventors: Byoung Young Kim, Jong Woo Kim, Young Cheol Shin
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Publication number: 20230048790Abstract: The present technology relates to an electronic device. According to the present technology, a memory device having improved verify accuracy may include a memory block including memory cells, a read and write circuit including a plurality of page buffers, a current sensing circuit configured to perform a verify operation of comparing sensing voltages with a reference voltage, and a control logic configured to control the current sensing circuit to perform the verify operation. The control logic controls performing a first verify operation on each of page buffer groups having a same logical group number, and performing a second verify operation on each of page buffer groups having a same physical group number, and the current sensing circuit outputs a verify pass signal in response to both results of the first verify operation and the second verify operation satisfying a pass criterion.Type: ApplicationFiled: December 21, 2021Publication date: February 16, 2023Inventors: Jong Woo KIM, Young Cheol SHIN
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Publication number: 20230044073Abstract: The present technology relates to an electronic device. A memory device according to the present technology includes a plurality of memory cells connected to a word line, an operation controller configured to apply a first or a second read voltage to the word line and to obtain data that is stored in the plurality of memory cells through bit lines that are respectively connected to the plurality of memory cells, and a read voltage controller configured to control the operation controller to read the data that is stored in the plurality of memory cells by using the second read voltage, and to read the data that is stored in the plurality of memory cells by using the first read voltage according to the number of off cells that are counted based on the data that is read by using the second read voltage, in response to a read command.Type: ApplicationFiled: January 13, 2022Publication date: February 9, 2023Applicant: SK hynix Inc.Inventors: Jong Woo KIM, Young Cheol SHIN
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Publication number: 20230040560Abstract: Provided herein is a memory device and a method of operating the memory device. The memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation for storing data in selected memory cells among the plurality of memory cells, and a control logic circuit configured to control the peripheral circuit to form threshold voltage distributions corresponding to target program states corresponding to the data to be stored in the selected memory cells, respectively, wherein the control logic controls the peripheral circuit to perform a main verify operation for any one of the target program states of the selected memory cells when a pre-verify operation for the any one of the target program states has passed.Type: ApplicationFiled: January 20, 2022Publication date: February 9, 2023Applicant: SK hynix Inc.Inventors: Jong Woo KIM, Young Cheol SHIN
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Publication number: 20230034695Abstract: A semiconductor memory device includes a memory cell array and a peripheral circuit. The memory cell array includes at least two planes. The peripheral circuit performs a memory operation on a selected plane of the at least two planes during a single plane operation and performs a dummy operation on an unselected plane of the at least two planes.Type: ApplicationFiled: October 7, 2022Publication date: February 2, 2023Inventors: Jong Woo KIM, Young Cheol SHIN
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Patent number: 11495305Abstract: A semiconductor memory device includes a memory cell array and a peripheral circuit. The memory cell array includes at least two planes. The peripheral circuit performs a memory operation on a selected plane of the at least two planes during a single plane operation and performs a dummy operation on an unselected plane of the at least two planes.Type: GrantFiled: August 26, 2020Date of Patent: November 8, 2022Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Publication number: 20220115062Abstract: A semiconductor memory device includes a memory block including a plurality of memory cells programmed to a plurality of program states during a program operation, a voltage generator to generate and apply a program voltage and a select line voltage to the memory block during the program operation, and a read and write circuit to temporarily store program data during the program operation and control a potential of bit lines of the memory block based on the temporarily stored program data. The voltage generator generates the select line voltage as a first select line voltage during a first program operation on some program states among the plurality of program states, or as a second select line voltage for which a potential is lower than a potential of the first select line voltage during a second program operation on remaining program states among the plurality of program states.Type: ApplicationFiled: April 12, 2021Publication date: April 14, 2022Applicant: SK hynix Inc.Inventors: Byoung Young KIM, Jong Woo KIM, Young Cheol SHIN
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Publication number: 20210304825Abstract: A semiconductor memory device includes a memory cell array and a peripheral circuit. The memory cell array includes at least two planes. The peripheral circuit performs a memory operation on a selected plane of the at least two planes during a single plane operation and performs a dummy operation on an unselected plane of the at least two planes.Type: ApplicationFiled: August 26, 2020Publication date: September 30, 2021Inventors: Jong Woo KIM, Young Cheol SHIN
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Patent number: 11074974Abstract: The present disclosure relates to an electronic device and a method of operating a memory device having a reduced program operation time including pre-charging a select line connected to the select transistor to a first select voltage during a first time period, discharging the select line during a second time period subsequent to the first time period, and discharging the select line while word lines connected to the plurality of memory cells are pre-charged to an operation voltage in a third time period subsequent to the second time period to change a level of the first select voltage pre-charged to the select line to a second select voltage.Type: GrantFiled: May 26, 2020Date of Patent: July 27, 2021Assignee: SK hynix Inc.Inventors: Jong Woo Kim, Young Cheol Shin
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Publication number: 20210174873Abstract: The present disclosure relates to an electronic device and a method of operating a memory device having a reduced program operation time including pre-charging a select line connected to the select transistor to a first select voltage during a first time period, discharging the select line during a second time period subsequent to the first time period, and discharging the select line while word lines connected to the plurality of memory cells are pre-charged to an operation voltage in a third time period subsequent to the second time period to change a level of the first select voltage pre-charged to the select line to a second select voltage.Type: ApplicationFiled: May 26, 2020Publication date: June 10, 2021Inventors: Jong Woo KIM, Young Cheol SHIN
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Patent number: 10826299Abstract: A grid-connected inverter system having a seamless switching function. An inverter converts DC power into AC power. A breaker is connected between the inverter, a grid, and a load to switch between a grid-connected operation and an independent operation. A filter converts an output of the inverter into a sine wave. A controller operates the inverter in a current control mode or a voltage control mode. The controller operates the inverter in the current control mode for a period of time longer than a turn-off time of the breaker when an abnormality in the grid is detected, and operates the inverter in the voltage control mode when the grid is disconnected from the load due to turn-off of the breaker.Type: GrantFiled: August 13, 2018Date of Patent: November 3, 2020Assignees: ENERGYPARTNERS CO., LTD.Inventor: Young Cheol Shin
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Publication number: 20200082358Abstract: Disclosed are an electronic settlement system, an electronic settlement method, and a cash payment method using a barcode displayed on a mobile terminal, thereby simply performing member identification using the barcode including member information, electronic settlement services (such as credit card settlement, direct payment card settlement, advance payment card settlement, small amount settlement, and Giro system settlement) at various shops via a procedure verifying whether a user is an actual owner of the barcode, cash payment services via member information barcode and member identification procedures, advance payment card services by depositing a designated amount of money at a database of the bank and allowing the user to systematically use the advance card within the deposited money, and wireless banking services for transmitting and receiving various banking related data via wireless network between the bank and the members.Type: ApplicationFiled: November 15, 2019Publication date: March 12, 2020Inventors: Young-Cheol SHIN, Chang-Hwan OH, Hyuck-Jin KWON, Doo-Seop EOM
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Publication number: 20190295047Abstract: Disclosed are an electronic settlement system, an electronic settlement method, and a cash payment method using a barcode displayed on a mobile terminal, thereby simply performing member identification using the barcode including member information, electronic settlement services (such as credit card settlement, direct payment card settlement, advance payment card settlement, small amount settlement, and Giro system settlement) at various shops via a procedure verifying whether a user is an actual owner of the barcode, cash payment services via member information barcode and member identification procedures, advance payment card services by depositing a designated amount of money at a database of the bank and allowing the user to systematically use the advance card within the deposited money, and wireless banking services for transmitting and receiving various banking related data via wireless network between the bank and the members.Type: ApplicationFiled: June 11, 2019Publication date: September 26, 2019Inventors: Young-Cheol SHIN, Chang-Hwan OH, Hyuck-Jin KWON, Doo-Seop EOM
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Publication number: 20190052097Abstract: A grid-connected inverter system having a seamless switching function. An inverter converts DC power into AC power. A breaker is connected between the inverter, a grid, and a load to switch between a grid-connected operation and an independent operation. A filter converts an output of the inverter into a sine wave. A controller operates the inverter in a current control mode or a voltage control mode. The controller operates the inverter in the current control mode for a period of time longer than a turn-off time of the breaker when an abnormality in the grid is detected, and operates the inverter in the voltage control mode when the grid is disconnected from the load due to turn-off of the breaker.Type: ApplicationFiled: August 13, 2018Publication date: February 14, 2019Inventor: Young Cheol SHIN
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Patent number: 8341079Abstract: Disclosed are an electronic settlement system, an electronic settlement method, and a cash payment method using a barcode displayed on a mobile terminal, thereby simply performing member identification using the barcode including member information, electronic settlement services (such as credit card settlement, direct payment card settlement, advance payment card settlement, small amount settlement, and Giro system settlement) at various shops via a procedure verifying whether a user is an actual owner of the barcode, cash payment services via member information barcode and member identification procedures, advance payment card services by depositing a designated amount of money at a database of the bank and allowing the user to systematically use the advance card within the deposited money, and wireless banking services for transmitting and receiving various banking related data via wireless network between the bank and the members.Type: GrantFiled: May 10, 2010Date of Patent: December 25, 2012Assignees: Pantech Co., Ltd., Secubay Corp.Inventors: Young-Cheol Shin, Chang-Hwan Oh, Hyuck-Jin Kwon, Doo-Seop Eom