Patents by Inventor Young Dae Cho

Young Dae Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916123
    Abstract: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: February 27, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Dae Cho, Ki Hwan Kim, Sung Uk Jang, Su Jin Jung
  • Publication number: 20240063306
    Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 22, 2024
    Inventors: Su Jin JUNG, Ki Hwan KIM, Sung Uk JANG, Young Dae CHO
  • Patent number: 11901453
    Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: February 13, 2024
    Inventors: Sung Uk Jang, Ki Hwan Kim, Su Jin Jung, Bong Soo Kim, Young Dae Cho
  • Patent number: 11843053
    Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: December 12, 2023
    Inventors: Su Jin Jung, Ki Hwan Kim, Sung Uk Jang, Young Dae Cho
  • Publication number: 20230381109
    Abstract: The present invention relates to an orally disintegrating tablet including a benzimidazole derivative compound and a preparation method thereof.
    Type: Application
    Filed: October 21, 2021
    Publication date: November 30, 2023
    Inventors: Min Jung Kim, Sun Young Park, Da Som Lim, Eun Kyung Jeon, Young Dae Cho, Tae Keun Cho
  • Publication number: 20230307545
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
    Type: Application
    Filed: June 1, 2023
    Publication date: September 28, 2023
    Inventors: Sung Uk JANG, Young Dae CHO, Ki Hwan KIM, Su Jin JUNG
  • Publication number: 20230201164
    Abstract: The present disclosure relates to a pharmaceutical composition containing a benzimidazole derivative compound. Specifically, the present disclosure relates to a formulation capable of maintaining a sustained blood concentration of the benzimidazole derivative compound.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 29, 2023
    Inventors: Suchul LEE, Eun Kyung JEON, Young Dae CHO, Sung Ah LEE, Dong Hyun KIM, Myeongjoong KIM, So Hyun JOO, Bong Tae KIM
  • Patent number: 11670716
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Young Dae Cho, Ki Hwan Kim, Su Jin Jung
  • Publication number: 20230087865
    Abstract: The present disclosure relates to a pharmaceutical composition that delayed-releases tegoprazan and releases clopidogrel immediately. The pharmaceutical composition may exhibit significantly excellent effects on the prevention and treatment of gastrointestinal disorders caused by administration of clopidogrel and thrombosis-related diseases.
    Type: Application
    Filed: February 26, 2021
    Publication date: March 23, 2023
    Inventors: Tae Keun CHO, Young Dae CHO, Eun Kyung JEON, Bong Tae KIM, Sung Jun KIM, Joo Hwan KIM, Tae Hyeong KIM
  • Patent number: 11594598
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
  • Publication number: 20230037672
    Abstract: A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.
    Type: Application
    Filed: March 11, 2022
    Publication date: February 9, 2023
    Inventors: Ki Hwan KIM, Jeong Ho YOO, Cho Eun LEE, Yong Uk JEON, Young Dae CHO
  • Publication number: 20220181459
    Abstract: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.
    Type: Application
    Filed: July 22, 2021
    Publication date: June 9, 2022
    Inventors: Young Dae Cho, Ki Hwan Kim, Sung Uk Jang, Su Jin Jung
  • Publication number: 20220181499
    Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.
    Type: Application
    Filed: August 10, 2021
    Publication date: June 9, 2022
    Inventors: Su Jin Jung, Ki Hwan Kim, Sung Uk Jang, Young Dae Cho
  • Publication number: 20220157990
    Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 19, 2022
    Inventors: Sung Uk JANG, Ki Hwan KIM, Su Jin JUNG, Bong Soo KIM, Young Dae CHO
  • Publication number: 20220102497
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Application
    Filed: December 9, 2021
    Publication date: March 31, 2022
    Inventors: Sung Uk JANG, Seung Hun LEE, Su Jin JUNG, Young Dae CHO
  • Patent number: 11257905
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
  • Patent number: 11239363
    Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: February 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Ki Hwan Kim, Su Jin Jung, Bong Soo Kim, Young Dae Cho
  • Publication number: 20210296499
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 23, 2021
    Inventors: Sung Uk JANG, Young Dae CHO, Ki Hwan KIM, Su Jin JUNG
  • Publication number: 20210251967
    Abstract: The present invention provides a pharmaceutical composition comprising clopidogrel or pharmaceutically acceptable salts thereof; and a compound of Formula 1 or pharmaceutically acceptable salts thereof as an active ingredient. The pharmaceutical composition of the present invention has an advantage of maintaining a medicinal effect of clopidogrel while preventing or treating a side effect of clopidogrel, i.e., gastrointestinal disorders.
    Type: Application
    Filed: August 27, 2019
    Publication date: August 19, 2021
    Applicant: HK INNO.N CORPORATION
    Inventors: Tae Keun CHO, Young Dae CHO, Eunji KWON, Myung Jin SHIN
  • Patent number: 11031502
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: June 8, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Uk Jang, Young Dae Cho, Ki Hwan Kim, Su Jin Jung