Abstract: A printed circuit board including a circuit board having a cavity between an upper surface of the circuit board and a lower surface of the circuit board that are substantially parallel to each other, and a connection board including insulating layers substantially parallel with metal layers, the metal layers including metal patterns. The connection board is disposed in the cavity with the insulating layers and the metal layers of the connection board substantially perpendicular to the upper and lower surfaces of the circuit board.

Abstract: A printed circuit board, a method of manufacturing a printed circuit board, and an electronic component module including a printed circuit board are provided. The printed circuit board includes a circuit board having a cavity, and a connection board including metal patterns, the connection board disposed in the cavity with the metal patterns disposed substantially vertically in the circuit board.

Abstract: A circuit board, and a package substrate and an electronic device that includes a circuit board are disclosed. The circuit board includes a core layer, a base pattern layer disposed on the core layer and a through-hole conductor that goes through the core layer, the base pattern layer including a circuit pattern that includes a conductive pad on the through-hole conductor, an insulator layer including at least one insulating layer stacked on the core layer and the base pattern layer, and a laminated pattern layer including a plurality of vias and a laminated circuit pattern, the plurality of vias penetrating the insulating layer, and the laminated circuit pattern being disposed on the insulating layer and including a plurality of via pads formed on the vias respectively.

Abstract: A common mode filter a manufacturing method thereof are disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a receiving groove formed on the magnetic substrate; a dielectric layer formed in the receiving groove and having a coil pattern included therein; and a magnetic layer formed on upper surfaces of the dielectric layer and the magnetic substrate.

Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.

Abstract: A common mode filter is disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a dielectric layer laminated on the magnetic substrate; an external electrode formed on the dielectric layer in such a way that one surface thereof is exposed to an outside; a conductive pattern formed on a surface of the dielectric layer so as to be located on a same plane as the external electrode and having one end thereof connected with the external electrode; an insulator film formed on a surface of the conductive pattern; and a magnetic layer formed on the insulator film so as to cover an upper surface and a lateral surface of the conductive pattern.

Abstract: An electronic component embedded substrate is disclosed. The electronic component embedded substrate in accordance with an embodiment of the present invention includes: a core substrate having a cavity formed therein; a plurality of electronic components embedded in the cavity and arranged in a predetermined format; and a plurality of dielectric spacers interposed in between the plurality of electronic components that are adjacent to one another in the cavity.

Abstract: A common mode filter is disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a coil pattern formed on the magnetic substrate; a dielectric layer formed on the magnetic substrate so as to cover an upper part, a lower part and a side surface of the coil pattern; and a first coupling agent interposed between the magnetic substrate and the dielectric layer so as to prevent the magnetic substrate and the dielectric layer from being separated.

Abstract: A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the present invention includes a substrate, which is formed with a ground circuit and mounted with a semiconductor chip on one surface, a conductive ground layer, which is formed on the other surface of the substrate and connected with the ground circuit, a molding, which seals up the ground layer and the substrate having the semiconductor chip mounted thereon, and a conductive shield, which covers the molding and is connected with the ground layer. With a semiconductor package in accordance with an embodiment of the present invention, grounding for shielding is possible even in an entirely molded structure, and a double shielding structure to improve the shielding property.

Abstract: An electronic component embedded substrate is disclosed. The electronic component embedded substrate in accordance with an embodiment of the present invention includes: a core substrate having a cavity formed therein; a plurality of electronic components embedded in the cavity and arranged in a predetermined format; and a plurality of dielectric spacers interposed in between the plurality of electronic components that are adjacent to one another in the cavity.

Abstract: A common mode filter a manufacturing method thereof are disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a receiving groove formed on the magnetic substrate; a dielectric layer formed in the receiving groove and having a coil pattern included therein; and a magnetic layer formed on upper surfaces of the dielectric layer and the magnetic substrate.

Abstract: A common mode filter is disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a coil pattern formed on the magnetic substrate; a dielectric layer formed on the magnetic substrate so as to cover an upper part, a lower part and a side surface of the coil pattern; and a first coupling agent interposed between the magnetic substrate and the dielectric layer so as to prevent the magnetic substrate and the dielectric layer from being separated.

Abstract: A common mode filter is disclosed. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a dielectric layer laminated on the magnetic substrate; an external electrode formed on the dielectric layer in such a way that one surface thereof is exposed to an outside; a conductive pattern formed on a surface of the dielectric layer so as to be located on a same plane as the external electrode and having one end thereof connected with the external electrode; an insulator film formed on a surface of the conductive pattern; and a magnetic layer formed on the insulator film so as to cover an upper surface and a lateral surface of the conductive pattern.

Abstract: A common mode filter is disclosed. The common mode filter in accordance with an aspect of the present invention includes: a first dielectric layer having a first groove formed along an outer boundary portion thereof; a second dielectric layer coated on the first dielectric layer so as to cover a first coil laminated on the first dielectric layer, having a first protrusion corresponding to the first groove formed on one surface thereof being in contact with the first dielectric layer, and having a second groove formed on the other surface thereof; and a third dielectric layer coated on the second dielectric layer so as to cover a second coil laminated on the second dielectric layer, having a second protrusion corresponding to the second groove formed on one surface thereof being in contact with the second dielectric layer, and having a third groove formed on the other surface thereof.

Abstract: A printed circuit board and a manufacturing method of the printed circuit board are disclosed. The printed circuit board includes: a first insulation layer having a first pattern formed thereon; a first trench caved in one surface of the first insulation layer along at least a portion of the first pattern; and a second insulation layer stacked on one surface of the first insulation layer so as to cover the first pattern. The first trench is filled by the second insulation layer.

Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board, the method including providing a substrate on which a first metal layer, a dielectric layer and an adhesive resin layer are stacked on the order thereof; etching a part of the first metal layer to form a first electrode and a first circuit pattern; compressing a surface of the substrate, on which the first electrode is formed, onto a core board by interposing an insulation resin layer; forming a second electrode and a second circuit pattern on the adhesive resin layer; stacking an insulation board on the substrate such that the second electrode and the second circuit pattern are covered; and forming a third circuit pattern on the insulation board.

Abstract: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor substrate, and the insulating layer; and an outer-layer circuit, being electrically connected to the metal post. With the present invention, it can become unnecessary to form an additional via for electrically connecting both surfaces of the semiconductor substrate, thereby simplifying the manufacturing process, reducing the manufacturing cost, and improving the coupling reliability.