Patents by Inventor Young Geun Yoo
Young Geun Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240252994Abstract: The pipe insert for generating nano-bubbles of the present invention is an insert inserted into a plumbing pipe in the longitudinal direction, wherein, in order to increase the friction surface of a gas-liquid mixed fluid for generating nano-bubbles in the pipe, the body of the insert is configured such that either or both of dividing walls dividing the fluid path space of the pipe and space dividers protruding into the fluid path space of the pipe are formed continuously in the longitudinal direction of the pipe.Type: ApplicationFiled: July 26, 2021Publication date: August 1, 2024Inventors: Young Ho YOO, Tae Geun YOO, A Ram YOO
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Patent number: 12042771Abstract: The present disclosure relates to a nanobubble generation system using friction in which a frictional force is applied to bubbles included in a gas-liquid mixed fluid so that the atomization of the bubbles is induced and nanobubbles are generated.Type: GrantFiled: July 30, 2020Date of Patent: July 23, 2024Assignee: FAWOO NANOTECH CO., LTD.Inventors: Young Ho Yoo, Tae Geun Yoo, A Ram Yoo
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Patent number: 9922965Abstract: A semiconductor package structure and a method for manufacturing the same are provided. According to the method, a first mold layer is formed to cover a first semiconductor chip and a first bumps. A portion of the first mold layer is removed to expose top portions of the first bumps and second bumps are disposed to be connected to each of the first bumps. A second mold layer is formed, and the second mold layer is recessed to form through mold connectors that substantially penetrate the second mold layer with the second bumps disposed on the first bumps.Type: GrantFiled: April 13, 2017Date of Patent: March 20, 2018Assignee: SK hynix Inc.Inventors: Jong Hoon Kim, Ki Jun Sung, Young Geun Yoo, Hyeong Seok Choi
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Patent number: 9837360Abstract: Wafer level packages are provided. The wafer level package includes alignment marks disposed at a first surface of a protection wafer, a semiconductor die disposed on the first surface of the protection wafer to be spaced apart from the alignment marks, a first photosensitive dielectric layer covering the semiconductor die and having a flat top surface, and a second dielectric layer covering the flat top surface of the first photosensitive dielectric layer. Redistribution lines are disposed between the first photosensitive dielectric layer and the second dielectric layer and electrically connected to the semiconductor die through first opening portions penetrating the first photosensitive dielectric layer. Outer connectors are disposed on the second dielectric layer and electrically connected to the redistribution lines through second opening portions penetrating the second dielectric layer.Type: GrantFiled: August 22, 2016Date of Patent: December 5, 2017Assignee: SK hynix Inc.Inventors: Hyeong Seok Choi, Ki Jun Sung, Jong Hoon Kim, Young Geun Yoo, Pil Soon Bae
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Publication number: 20170221868Abstract: A semiconductor package structure and a method for manufacturing the same are provided. According to the method, a first mold layer is formed to cover a first semiconductor chip and a first bumps. A portion of the first mold layer is removed to expose top portions of the first bumps and second bumps are disposed to be connected to each of the first bumps. A second mold layer is formed, and the second mold layer is recessed to form through mold connectors that substantially penetrate the second mold layer with the second bumps disposed on the first bumps.Type: ApplicationFiled: April 13, 2017Publication date: August 3, 2017Applicant: SK hynix Inc.Inventors: Jong Hoon KIM, Ki Jun SUNG, Young Geun YOO, Hyeong Seok CHOI
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Publication number: 20170170127Abstract: According to various embodiments, there may be provided packages, semiconductors, and wafer level packages, and there may be provided methods of manufacturing packages, semiconductors, and wafer level packages. A method of manufacturing a wafer level package may include forming alignment marks at a surface of a protection wafer, mounting semiconductor dice on the protection wafer using the alignment marks, forming a first dielectric layer covering the semiconductor dice, planarizing a top surface of the first photosensitive layer, exposuring and developing portions of the planarized first dielectric layer to form opening portions exposing portions of the semiconductor dice, and forming redistribution lines on the first photosensitive dielectric layer. A second dielectric layer may be formed to cover the redistribution lines. Related wafer level packages may also be provided.Type: ApplicationFiled: August 22, 2016Publication date: June 15, 2017Inventors: Hyeong Seok CHOI, Ki Jun SUNG, Jong Hoon KIM, Young Geun YOO, Pil Soon BAE
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Patent number: 9659910Abstract: A semiconductor package structure and a method for manufacturing the same are provided. According to the method, a first mold layer is formed to cover a first semiconductor chip and a first bumps. A portion of the first mold layer is removed to expose top portions of the first bumps and second bumps are disposed to be connected to each of the first bumps. A second mold layer is formed, and the second mold layer is recessed to form through mold connectors that substantially penetrate the second mold layer with the second bumps disposed on the first bumps.Type: GrantFiled: May 27, 2016Date of Patent: May 23, 2017Assignee: SK hynix Inc.Inventors: Jong Hoon Kim, Ki Jun Sung, Young Geun Yoo, Hyeong Seok Choi
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Patent number: 9640473Abstract: Semiconductor packages are provided. A semiconductor package may include an embedding substrate including a cavity therein and a connection window in a bottom portion of the cavity. The semiconductor package may include a semiconductor chip disposed in the cavity and coupled to chip connectors, the chip connectors of the semiconductor chip inserted into the connection window. The semiconductor package may include a dielectric layer filling the cavity and the connection window and configured to expose end portions of the chip connectors and to substantially cover the semiconductor chip. Related memory cards and related electronic systems are also provided.Type: GrantFiled: July 28, 2015Date of Patent: May 2, 2017Assignee: SK HYNIX INC.Inventors: Ki Jun Sung, Young Geun Yoo
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Publication number: 20160247781Abstract: Semiconductor packages are provided. A semiconductor package may include an embedding substrate including a cavity therein and a connection window in a bottom portion of the cavity. The semiconductor package may include a semiconductor chip disposed in the cavity and coupled to chip connectors, the chip connectors of the semiconductor chip inserted into the connection window. The semiconductor package may include a dielectric layer filling the cavity and the connection window and configured to expose end portions of the chip connectors and to substantially cover the semiconductor chip. Related memory cards and related electronic systems are also provided.Type: ApplicationFiled: July 28, 2015Publication date: August 25, 2016Inventors: Ki Jun SUNG, Young Geun YOO
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Patent number: 9324688Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.Type: GrantFiled: May 8, 2014Date of Patent: April 26, 2016Assignee: SK HYNIX INC.Inventors: Ki Jun Sung, Seung Jee Kim, Jong Hyun Nam, Sang Yong Lee, Young Geun Yoo
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Patent number: 9153557Abstract: A chip stack embedded package includes a first dielectric layer having a multistep cavity therein, a first plurality of semiconductor chips disposed in a first level of the multistep cavity, a second plurality of semiconductor chips disposed in a second level of the multistep cavity, and a second dielectric layer filling the multistep cavity to cover the first and second pluralities of semiconductor chips.Type: GrantFiled: August 5, 2014Date of Patent: October 6, 2015Assignee: SK Hynix Inc.Inventors: Ki Jun Sung, Seung Jee Kim, Jong Hyun Nam, Sang Yong Lee, Young Geun Yoo
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Publication number: 20150255427Abstract: A chip stack embedded package includes a first dielectric layer having a multistep cavity therein, a first plurality of semiconductor chips disposed in a first level of the multistep cavity, a second plurality of semiconductor chips disposed in a second level of the multistep cavity, and a second dielectric layer filling the multistep cavity to cover the first and second pluralities of semiconductor chips.Type: ApplicationFiled: August 5, 2014Publication date: September 10, 2015Inventors: Ki Jun SUNG, Seung Jee KIM, Jong Hyun NAM, Sang Yong LEE, Young Geun YOO
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Publication number: 20150179608Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.Type: ApplicationFiled: May 8, 2014Publication date: June 25, 2015Applicant: SK HYNIX INC.Inventors: Ki Jun SUNG, Seung Jee KIM, Jong Hyun NAM, Sang Yong LEE, Young Geun YOO
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Patent number: 7038556Abstract: Disclosed are a waveguide type signal attenuator for attenuating an input signal as desired and a waveguide type signal terminator for making an input signal be utterly disappeared, where a manufacturing-easy resistor sheet is inserted into the center area, along which a traveling electromagnetic wave has the maximum intensity, of the signal attenuator and the signal terminator. In the signal terminator and the signal attenuator, a predetermined part of the waveguide which is formed in a lower conductive plate is expanded out along the half-height plane of the waveguide to form a resistor sheet setting groove and a portion of the elongated cavity positioned behind the resistor sheet setting groove forms a lower half of the waveguide. In addition, a resistor sheet is inserted between the resistor sheet setting groove and a protrusion part which protrudes from an upper conductive plate, of the half-height of the waveguide holds the resistor sheet to form an upper half portion of the waveguide.Type: GrantFiled: March 19, 2004Date of Patent: May 2, 2006Assignee: ComoTech CorporationInventors: Jae We An, Young Geun Yoo
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Patent number: 6987434Abstract: A non-radiative dielectric (NRD) waveguide modulator is provided having a waveguide type hybrid coupler, in which by forming a waveguide type 180° hybrid coupler and waveguide as a single body, the structure is simplified and manufacturing processes are reduced. The NRD waveguide modulator includes a conducting housing having a lower conducting plate and an upper conducting plate; a hybrid coupler which is processed in the form of conduit lines inside the conducting housing and includes a ring portion and a plurality of waveguides extended from the ring portion in the radial direction, in modulator, and a termination which is connected to an isolation port that is an end of any one waveguide of the hybrid coupler and terminates a signal reflected by the modulator by consuming the signal internally.Type: GrantFiled: January 8, 2004Date of Patent: January 17, 2006Assignee: Comotech CorporationInventors: Jae We An, Young Geun Yoo, Myoung Yeul Park, Dong Jin Jo
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Patent number: 6871056Abstract: Disclosed is a NRD waveguide mixer adopting a ring hybrid coupler applicable to a small-sized and high functional millimeter wave receiving/transmitting device. The NRD waveguide has a housing including two parallel conductive plates. The ring hybrid coupler is installed in the housing and has an annular ring formed with first to fourth ports which are radially extended about the annular ring. An oscillating device is connected to the first port so as to generate a local oscillating signal. A rod antenna is connected to the second port so as to receive/transmit a radio frequency signal. A first balanced mixer mount is connected to the third port and is provided with a first Schottky diode. A second balanced mixer mount is connected to the fourth port and is provided with a second Schottky diode. The radio frequency signal and the oscillating signal inputted from the first and second ports are mixed in the ring hybrid coupler to be transformed into an addition signal and a subtraction signal.Type: GrantFiled: May 2, 2001Date of Patent: March 22, 2005Assignee: NRD Co. Ltd.Inventors: Dong Jin Cho, Young Geun Yoo
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Patent number: 6600392Abstract: Disclosed is a metal window filter assembly, of a millimeter wave band, using an NRD guide. The filter assembly comprises a filter housing including parallel conductive plates and a filter for filtering a certain frequency band of an electromagnetic wave traveling therethrough. The filter includes a plurality of polygonal metal windows and a single body type dielectric line made from a non-radiative dielectric. A plurality of polygonal inserting grooves spaced by the predetermined distance are formed respectively on both surfaces of the dielectric line making contact with the parallel conductive plates. The metal windows are inserted in the inserting grooves one to one to form multi-staged dielectric resonators cascaded as a single body. The filter has a filtering function selectively passing the certain frequency band determined by an impedance coupling relationship that the multi-staged dielectric resonators have with respect to the electromagnetic wave.Type: GrantFiled: October 23, 2001Date of Patent: July 29, 2003Assignee: NRD Co., Ltd.Inventors: Young Su Kim, Young Geun Yoo
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Patent number: 6545552Abstract: Disclosed is a local oscillator utilizing an NRD guide applicable to a millimeter wave integrated circuits. A Gunn diode is buried in a bottom of a housing so that a heat generated from the Gunn diode is directly transferred to the housing and is rapidly emitted. Thus, an oscillating power and an oscillating frequency obtained from the local oscillator can be stabilized due to efficient heat-emission. Since a diode mount is not required, manufacturing costs can be reduced while productivity increases. A metal rod resonator, which is easily assembled and has good power and frequency stability as compared with a microstrip resonator, is used as a resonating device. The metal rod resonator is inserted into a fixing block in perpendicular to the NRD guide. An end of the metal rod resonator directly makes contact with an anode of the gun diode. A cavity forming member for defining a cavity, which surrounds main components including the Gunn diode, is installed in the housing.Type: GrantFiled: May 2, 2001Date of Patent: April 8, 2003Assignee: NRD Co., Ltd.Inventors: Young Su Kim, Young Geun Yoo
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Publication number: 20030006865Abstract: Disclosed is a metal window filter assembly, of a millimeter wave band, using an NRD guide. The filter assembly comprises a filter housing including parallel conductive plates and a filter for filtering a certain frequency band of an electromagnetic wave traveling therethrough. The filter includes a plurality of polygonal metal windows and a single body type dielectric line made from a non-radiative dielectric. A plurality of polygonal inserting grooves spaced by the predetermined distance are formed respectively on both surfaces of the dielectric line making contact with the parallel conductive plates. The metal windows are inserted in the inserting grooves one to one to form multi-staged dielectric resonators cascaded as a single body. The filter has a filtering function selectively passing the certain frequency band determined by an impedance coupling relationship that the multi-staged dielectric resonators have with respect to the electromagnetic wave.Type: ApplicationFiled: October 23, 2001Publication date: January 9, 2003Inventors: Young Su Kim, Young Geun Yoo
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Publication number: 20020132601Abstract: Disclosed is a NRD waveguide mixer adopting a ring hybrid coupler applicable to a small-sized and high functional millimeter wave receiving/transmitting device. The NRD waveguide has a housing including two parallel conductive plates. The ring hybrid coupler is installed in the housing and has an annular ring formed with first to fourth ports which are radially extended about the annular ring. An oscillating device is connected to the first port so as to generate a local oscillating signal. A rod antenna is connected to the second port so as to receive/transmit a radio frequency signal. A first balanced mixer mount is connected to the third port and is provided with a first Schottky diode. A second balanced mixer mount is connected to the fourth port and is provided with a second Schottky diode. The radio frequency signal and the oscillating signal inputted from the first and second ports are mixed in the ring hybrid coupler to be transformed into an addition signal and a subtraction signal.Type: ApplicationFiled: May 2, 2001Publication date: September 19, 2002Applicant: NRD Co., Ltd.Inventors: Dong Jin Cho, Young Geun Yoo