Abstract: A multilayer ceramic capacitor includes: a ceramic body including a plurality of dielectric layers and a plurality of first and second internal electrodes stacked in a width direction; a pair of first external electrodes disposed on a mounting surface of the ceramic body to be spaced apart from one another and connected to the plurality of first internal electrodes; a second external electrode disposed between the pair of first external electrodes on the mounting surface of the ceramic body and connected to the plurality of second internal electrodes; and a dummy electrode disposed on a surface of the ceramic body opposing the mounting surface of the ceramic body.

Abstract: There is provided a multilayered ceramic capacitor, including: a ceramic body; an active layer including a plurality of first and second internal electrodes; an upper cover layer; a lower cover layer formed below the active layer, the lower cover layer being thicker than the upper cover layer; first and second external electrodes; at least one pair of first and second internal electrodes repeatedly formed inside the lower cover layer, wherein, when A is defined as ½ of an overall thickness of the ceramic body, B is defined as a thickness of the lower cover layer, C is defined as ½ of an overall thickness of the active layer, and D is defined as a thickness of the upper cover layer, a ratio of deviation between a center of the active layer and a center of the ceramic body, (B+C)/A, satisfies 1.063?(B+C)/A?1.745.

Abstract: Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon. The mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, in which a dielectric layer on which inner electrodes are disposed is stacked and external electrode terminals connecting the inner electrodes in parallel are disposed on both ends thereof, wherein the inner electrodes of the multi-layered ceramic capacitor and the circuit board are disposed so as to be a horizontal direction to connect the external electrode terminals with a land on the circuit board by a conductive material and a ratio of a bonding area ASOLEDER of the conductive material to the area AMLCC of the external electrode terminals AMLCC is set to be less than 1.4, thereby remarkably reducing the vibration noise.

Abstract: A multilayer ceramic capacitor and a board having the same are provided. The multilayer ceramic capacitor includes three external electrodes including a conductive layer, a nickel plating layer, and a tin plating layer sequentially stacked on a mounting surface of the ceramic body, and spaced apart from each other. When an outermost portion of a lead-out portion of an internal electrode exposed to the mounting surface is P, a total thickness of the conductive layer, the nickel plating layer, and the tin plating layer in a normal line direction of the conductive layer from P is a, a thickness of the conductive layer in the normal line direction of the conductive layer from P is b, and a sum of pore heights of pores existing in the conductive layer in the normal line direction of the conductive layer from P is bp, (b?bp)/a satisfies 0.264?(b?bp)/a?0.638.

Abstract: There is provided a multilayered ceramic capacitor, including: a ceramic body having a plurality of dielectric layers laminated therein; an active layer including a plurality of internal electrodes having the respective dielectric layers interposed therebetween; an upper cover layer; a lower cover layer; external electrodes; and a plurality of dummy electrodes, wherein, when A is defined as ½ of an overall thickness of the ceramic body, B is defined as the thickness of the lower cover layer, C is defined as ½ of an overall thickness of the active layer, and D is defined as the thickness of the upper cover layer, a ratio of deviation between a center portion of the active layer and a center portion of the ceramic body, (B+C)/A, satisfies 1.063?(B+C)/A?1.745.

Abstract: A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.

Abstract: A multilayered ceramic capacitor includes a ceramic body in which a plurality of dielectric layers having an average thickness of 0.2 to 2.0 ?m are stacked; an active layer including a plurality of first and second internal electrodes alternately exposed to both end surfaces of the ceramic body, having the dielectric layer interposed therebetween, to form capacitance; an upper cover layer formed above the active layer; a lower cover layer formed below the active layer and thicker than the upper cover layer; and first and second external electrodes covering both end surfaces of the ceramic body, wherein the dielectric layer is configured of dielectric grains, and when an average thickness of the dielectric layer is defined as td, an average thickness of the first and second internal electrodes is defined as te, and an average grain size of the dielectric grains is defined as Da, Da?td/3 and 0.2 ?m<te<(td)1/2 are satisfied.

Abstract: A multilayer ceramic capacitor includes: a ceramic body having laminated dielectric layers having an average thickness of 0.2-2.0 ?m; an active layer including first and second internal electrodes alternately exposed through end surfaces of the ceramic body having the dielectric layer interposed therebetween and contributing to capacitance formation; upper and lower cover layers respectively formed above and below the active layer, the lower cover layer being thicker than the upper cover layer; first and second external electrodes covering the end surfaces of the ceramic body, wherein a bottommost internal electrode adjacent to the lower cover layer has an oxide layer formed on at least one of top and bottom surfaces thereof, and when lengths and thicknesses of the bottommost internal electrode and the oxide layer are denoted by ‘Le,’ ‘te’ and ‘Lo,’ ‘to’, respectively, in a cross section of the ceramic body taken in length-thickness direction, 50%<Lo/Le×100 and 30%<to/te×100<80% are satisfied.

Abstract: There is provided a multilayered ceramic capacitor, including: a ceramic body; an active layer including a plurality of first and second internal electrodes; an upper cover layer; a lower cover layer formed below the active layer, the lower cover layer being thicker than the upper cover layer; first and second external electrodes; at least one pair of first and second internal electrodes repeatedly formed inside the lower cover layer, wherein, when A is defined as 1/2 of an overall thickness of the ceramic body, B is defined as a thickness of the lower cover layer, C is defined as 1/2 of an overall thickness of the active layer, and D is defined as a thickness of the upper cover layer, a ratio of deviation between a center of the active layer and a center of the ceramic body, (B+C)/A, satisfies 1.063?(B+C)/A?1.745.

Abstract: There is provided a thin film-type coil component having a size equal to or less than 0806 and including a ceramic main body, external electrodes including a plurality of first external electrodes formed on one surface of the ceramic main body and a plurality of second external electrodes formed on the other surface facing one surface of the ceramic main body, and a coil unit including a plurality of coil layers stacked in the ceramic main body, thereby obtaining low direct current (DC) resistance.

Abstract: There is provided a thin film-type coil component having a size equal to or less than 0806 and including a ceramic main body, external electrodes including a plurality of first external electrodes formed on one surface of the ceramic main body and a plurality of second external electrodes formed on the other surface facing one surface of the ceramic main body, and a coil unit including a plurality of coil layers stacked in the ceramic main body, thereby obtaining low direct current (DC) resistance.

Abstract: A multilayer ceramic capacitor may include: a ceramic body including a plurality of dielectric layers; a capacitor unit disposed in an upper portion of the ceramic body and including a plurality of first and second internal electrodes; an equivalent series resistance (ESR) controller disposed in a lower portion of the ceramic body and including a plurality of third and fourth internal electrodes; a gap layer disposed between the capacitor unit and the ESR controller; first and second external electrodes disposed on the first and second end surfaces of the ceramic body and electrically connected to the first and second internal electrodes; and third and fourth external electrodes disposed on the first and second lateral surfaces of the ceramic body and electrically connected to the third and fourth internal electrodes.

Abstract: There is provided a multilayered ceramic capacitor, including: a ceramic body; an active layer including a plurality of first and second internal electrodes; an upper cover layer; a lower cover layer, the lower cover layer being thicker than the upper cover layer; a dummy electrode formed inside at least one of the upper and lower cover layers; and first and second external electrodes, wherein, when A is defined as ½ of an overall thickness of the ceramic body, B is defined as a thickness of the lower cover layer, C is defined as ½ of an overall thickness of the active layer, and D is defined as a thickness of the upper cover layer, a ratio of deviation between a center of the active layer and a center of the ceramic body, (B+C)/A, satisfies 1.063?(B+C)/A?1.745.

Abstract: A coupling structure for a multi-layered chip filter includes a resonator layer including a resonator pattern with spaced areas and a coupling layer including at least two separated overlap portion patterns overlapped with the spaced areas of the resonator pattern respectively and a connecting portion pattern having multiple linear portions connecting the separated overlap portion patterns in an area not-overlapped with the resonator pattern.

Abstract: The present invention discloses a filter for removing noise, which includes: a lower magnetic substrate; a coil layer disposed on the lower magnetic substrate and including at least one conductor pattern and an insulating layer covering the conductor pattern; an upper magnetic substrate disposed on the coil layer; and a magnetic permeability enhancing layer disposed on the magnetic substrate with lower magnetic permeability of the lower magnetic substrate and the upper magnetic substrate. According to the present invention, it is possible to implement a filter for removing noise with high performance, characteristics, and reliability by increasing magnetic permeability to improve impedance characteristics and improving an effect of shielding electromagnetic waves such as jamming.

Abstract: A multilayer ceramic electronic component may include a ceramic body having a plurality of dielectric layers stacked in the ceramic body; a plurality of active layers including first and second internal electrodes disposed to be alternately exposed to the end surfaces of the ceramic body with the dielectric layers interposed between the first and second internal electrodes; and dummy layers disposed between the active layers.

Abstract: A multilayer ceramic capacitor may include a ceramic body having a plurality of dielectric layers; first and second internal electrodes disposed in the ceramic body to be alternately exposed to the first and second end surfaces of the ceramic body, having the dielectric layers interposed therebetween; and first and second external electrodes electrically connected to the first and second internal electrodes, respectively. The first and second external electrodes may include: first and second internal conductive layers; first and second insulating layers; and first and second external conductive layers.

Abstract: A multilayer ceramic electronic component including: a ceramic body having a plurality of dielectric layers stacked therein; active layers including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layers interposed therebetween; and first and second external electrodes formed on the both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The active layers may include a first active layer including a ferroelectric layer and a second active layer including a paraelectric layer, the first and second active layers being alternately stacked.

Abstract: An electronic chip component includes a ceramic body; external electrodes formed on end portions of the ceramic body; an interposer supporting the ceramic body and electrically connected to the external electrodes, wherein the interposer includes a first electrode pad formed on a surface thereof and having the external electrodes disposed thereon, a second electrode pad formed on an opposing surface thereof, and a connection electrode pad connecting the first electrode pad to the second electrode pad and formed on a lateral surface between the surface and the opposing surface of the interposer, the first electrode pad is divided into first and second electrode patterns disposed at ends of the interposer based on a space formed therebetween, a non-electrode margin portion is formed between ends of the first electrode pad and ends of the interposer, and the connection electrode pad is formed on the lateral surface of the interposer.

Abstract: There is provided a composite electronic component including a composite body having a capacitor and an inductor coupled to each other, the capacitor including a ceramic body in which a plurality of dielectric layers and first and second internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor including a magnetic body including a coil part; a first input terminal; an output terminal; and a ground terminal.