Abstract: Disclosed is a technique for switching from a master node to a secondary node in a communication system. A method of a first communication node may comprise: adding the first communication node as a primary secondary cell (PSCell) to a second communication node through dual connectivity (DC); generating a first user plane path for smart dynamic switching (SDS) and a first instance for supporting the first user plane path according to a request from the second communication node; transmitting information on the first user plane path and the first instance to a terminal; receiving user data based on the first user plane path from the terminal as the first instance; and transmitting the user data to a core network using the first user plane path.

Abstract: An embodiment solid electrolyte includes a first compound and a second compound. The first compound is represented by a first chemical formula Li7-aPS6-a(X11-bX2b)a, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, and wherein 0<a?2 and 0<b<1, and the second compound is represented by a second chemical formula Li7-cP1-2dMdS6-c-3d(X11-eX2e)c, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, wherein M represents Ge, Si, Sn, or any combination thereof, and wherein 0<c?2, 0<d<0.5, and 0<e<1.

Abstract: A manufacturing method of a semiconductor device may include: forming a stack comprising first material layers and second material layers that are alternately stacked; forming an opening in the stack; forming a first seed layer in the opening; forming a first buffer layer by surface-treating the first seed layer; and forming a blocking layer by oxidizing the first seed layer through the first buffer layer.

Abstract: A novel quinazoline compound having SOS1 inhibitory activity and uses of the quinazoline compound are disclosed. More particularly, the present invention relates to a novel quinazoline derivative compound having inhibitory activity on SOS1 binding to RAS family proteins and/or RAC1, to pharmacologically acceptable salts thereof, and to pharmaceutical compositions containing the quinazoline compound. The novel quinazoline compound has the following chemical formula 1: wherein all the variables have meaning as defined in the specification.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A display panel includes an array substrate, an opposite substrate facing the array substrate, and a liquid crystal layer interposed between the array and opposite substrates. The array substrate includes a gate wiring, a data wiring, a pixel section, a sensor wiring section, a sensor electrode section and a sensor pad section. The gate wiring is formed in a first direction. The data wiring is formed in a second direction crossing the first direction. The pixel section is electrically connected to the gate and data wirings. The sensor wiring section is spaced apart from the gate and data wirings. The sensor electrode section is electrically connected to the sensor wiring section. The sensor pad section applies a test voltage to the sensor wiring section in order to inspect a display panel defect. Therefore, a short defect, which is generated between the array substrate and the opposite substrate, may be easily inspected.

Abstract: A compensation device for convergence drift used in a CRT, including a convergence electrode attached on an outer surface of a neck portion, an inducement means for inducing static electricity from a voltage to be supplied for an inner graphite layer, and a connecting member formed between the convergence electrode and the inducement means to supply high potential from the inducement means to the convergence electrode. As the convergence electrode provides high potential generated from the inducement means to the neck portion, the compensation device decreases the potential difference between grid electrodes and the neck portion. Thus, the compensation device makes the electric fields, which cause the charges to be accumulated, to weaken so that the convergence drift is effectively reduced.

Abstract: A compensation device for convergence drift used in a CRT, including a convergence electrode attached on an outer surface of a neck portion, an inducement means for inducing static electricity from a voltage to be supplied for an inner graphite layer, and a connecting member formed between the convergence electrode and the inducement means to supply high potential from the inducement means to the convergence electrode. As the convergence electrode provides high potential generated from the inducement means to the neck portion, the compensation device decreases the potential difference between grid electrodes and the neck portion. Thus, the compensation device makes the electric fields, which cause the charges to be accumulated, to weaken so that the convergence drift is effectively reduced.

Abstract: A memory module having a module control circuit which is capable of decreasing an operational current by configuring a 1BANK 4M.times.64 module using 16M DRAMs (1K Refresh.times.16) and reducing the number of operational devices. The module control circuit decodes externally inputted eleventh and twelfth address signals and outputs control signals in accordance with one of a plurality of column address strobe signals and a row address strobe signal, and a plurality of DRAMs in a memory unit are selected by the control signals from the module control circuit and are parallely connected for performing a data write and read operation in accordance with externally inputted first through tenth address signals, a write enable signal, an output enable signal, and the column address strobe signals.