Patents by Inventor Young-Gun Pu

Young-Gun Pu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210175800
    Abstract: Disclosed is a power supply apparatus including a DC-DC converter implemented as one integrated circuit. A duty of a switching pulse of a DC-DC conversion unit is controlled according to a phase difference between a feedback clock signal and a reference clock signal having a frequency proportional to an output voltage of the DC-DC conversion unit. The duty of the switching pulse may be controlled from an output of a charge pump to be charged and discharged according to the phase difference signal between the feedback clock signal and the reference clock signal.
    Type: Application
    Filed: December 9, 2020
    Publication date: June 10, 2021
    Applicants: SKAIChips Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Kang Yoon LEE, Jong Wan JO, Kyung Duk CHOI, Young Gun PU
  • Publication number: 20210143733
    Abstract: The present invention provides a technique for a power supply, and particularly, a buck-boost DC-DC converter which is advantageous for energy harvesting from a low voltage. An LC resonant unit generates a pair of clock type signals having phases opposite to each other from an input signal. These signals are supplied to the clock input terminals of the Dickson charge pumps connected in series and converted into power signals having an amplified voltage so as to match the rated input specification of the buck-boost DC-DC converter of a post-stage.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 13, 2021
    Applicants: SKAIChips Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Kang Yoon LEE, REZA EFTEKHARI RAD, Qurat ul AIN, Jong Wan JO, Kyung Duk CHOI, Young Gun PU
  • Patent number: 9467121
    Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit, The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: October 11, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Hee Lee, Jong-Won Choi, Sang-Wook Han, Sung-Jun Lee, Young-Taek Lee, Young-Gun Pu
  • Patent number: 9252784
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Hee Lee, Jong-Won Choi, Young-Taek Lee, Byung-Hak Cho, Young-Gun Pu
  • Publication number: 20150130514
    Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit. The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.
    Type: Application
    Filed: August 26, 2014
    Publication date: May 14, 2015
    Inventors: Joon-Hee LEE, Jong-Won CHOI, Sang-Wook HAN, Sung-Jun LEE, Young-Taek LEE, Young-Gun PU
  • Publication number: 20150130542
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Application
    Filed: September 17, 2014
    Publication date: May 14, 2015
    Inventors: Joon-Hee LEE, Jong-Won CHOI, Young-Taek LEE, Byung-Hak CHO, Young-Gun PU
  • Publication number: 20140035684
    Abstract: There are provided a control circuit for a digitally controlled oscillator and a control apparatus for a digitally controlled oscillator using the same. The control circuit for a digitally controlled oscillator includes: a peak detection circuit detecting amplitude of a signal output from the digitally controlled oscillator; and a transconductance control circuit comparing an output of the peak detection circuit with a predetermined reference signal to control a transconductance value of a negative transconductance circuit included in the digitally controlled oscillator.
    Type: Application
    Filed: November 13, 2012
    Publication date: February 6, 2014
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yoo Sam NA, Kang Yoon LEE, Dong Su LEE, Hyung Gu PARK, Hong Jin KIM, Gyu Suck KIM, Young Gun PU
  • Publication number: 20140009317
    Abstract: There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 9, 2014
    Inventors: Yoo Sam NA, Kang Yoon Lee, Young Gun Pu, Hyung Gu Park, Hong Jin Kim, Yoo Hwan Kim, Dong Su Lee
  • Patent number: 8618972
    Abstract: There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: December 31, 2013
    Assignees: Samsung Electro-Mechanics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Yoo Sam Na, Kang Yoon Lee, Young Gun Pu, Hyung Gu Park, Hong Jin Kim, Yoo Hwan Kim, Dong Su Lee
  • Patent number: 8604851
    Abstract: A digital Phase Locked Loop (PLL) in a wireless communication system is provided. The PLL includes a Digitally Controlled Oscillator (DCO), a divider, a Phase Frequency Detector (PFD), a Time to Digital Converter (TDC), a delay comparator, and a level scaler. The DCO generates a frequency signal depending on an input Digital Tuning Word (DTW). The divider divides the frequency signal at an integer ratio. The PFD generates a signal representing a phase difference between a divided frequency signal and a reference signal. The TDC measures a time interval of the phase difference using the signal representing the phase difference. The delay comparator calculates a time interval in the case where rising edges coincide from values measured by the TDC. The level scaler generates a DTW that operates the DCO using a digital code representing the time interval.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: December 10, 2013
    Assignees: Samsung Electronics Co., Ltd., Konkuk University Industrial Cooperation Corp
    Inventors: Kang-Yoon Lee, Young-Gun Pu, An-Soo Park, Joon-Sung Park, Jae-Sup Lee
  • Publication number: 20130147531
    Abstract: A digital Phase Locked Loop (PLL) in a wireless communication system is provided. The PLL includes a Digitally Controlled Oscillator (DCO), a divider, a Phase Frequency Detector (PFD), a Time to Digital Converter (TDC), a delay comparator, and a level scaler. The DCO generates a frequency signal depending on an input Digital Tuning Word (DTW). The divider divides the frequency signal at an integer ratio. The PFD generates a signal representing a phase difference between a divided frequency signal and a reference signal. The TDC measures a time interval of the phase difference using the signal representing the phase difference. The delay comparator calculates a time interval in the case where rising edges coincide from values measured by the TDC. The level scaler generates a DTW that operates the DCO using a digital code representing the time interval.
    Type: Application
    Filed: August 19, 2011
    Publication date: June 13, 2013
    Inventors: Kang-Yoon Lee, Young-Gun Pu, An-Soo Park, Joon-Sung Park, Jae-Sup Lee
  • Patent number: 8330637
    Abstract: A Time-to-Digital Converter (TDC) is provided.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: December 11, 2012
    Assignees: Samsung Electronics Co., Ltd., Konkuk University Industry Cooperation Corp.
    Inventors: Jae-Sup Lee, Kang-Yoon Lee, An-Soo Park, Young-Gun Pu, Joon-Sung Park
  • Publication number: 20110260902
    Abstract: A Time-to-Digital Converter (TDC) is provided.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 27, 2011
    Applicants: KONKUK UNIVERSITY INDUSTRY COOPERATION CORP., SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Jae-Sup LEE, Kang-Yoon LEE, An-Soo PARK, Young-Gun PU, Joon-Sung PARK