Patents by Inventor Young Hoon CHA

Young Hoon CHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11544002
    Abstract: A memory system, a memory controller and an operating method are disclosed. When a target command which instructs an operation of writing target data to a memory device is received from a host, the target data is divided into data units, and a first data unit among the data units is controlled such that the entire first data unit is written to the memory device or none of the first data unit is written to the memory device. As a consequence, it is possible to write data in specific units in a memory system using a multi-core.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: January 3, 2023
    Assignee: SK hynix Inc.
    Inventors: Dae Hoon Jang, Dong Ham Yim, Young Hoon Cha, Young Guen Choi, Jeong Sun Park, Cheon Ok Jeong
  • Patent number: 11182108
    Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method. The present disclosure may divide user data and map data corresponding to the user data into data segments, may input the data segments in N virtual die queues, and may program the same in a memory device, wherein a user data segment input in the virtual die queue is programmed according to two program schemes, thereby quickly programming the user data and the map data in the memory device and quickly updating the map data in a map cache.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: November 23, 2021
    Assignee: SK hynix Inc.
    Inventors: Young Guen Choi, Dong Ham Yim, Dae Hoon Jang, Young Hoon Cha
  • Publication number: 20210103405
    Abstract: A memory system, a memory controller and an operating method are disclosed. When a target command which instructs an operation of writing target data to a memory device is received from a host, the target data is divided into data units, and a first data unit among the data units is controlled such that the entire first data unit is written to the memory device or none of the first data unit is written to the memory device. As a consequence, it is possible to write data in specific units in a memory system using a multi-core.
    Type: Application
    Filed: March 19, 2020
    Publication date: April 8, 2021
    Inventors: Dae Hoon JANG, Dong Ham YIM, Young Hoon CHA, Young Guen CHOI, Jeong Sun PARK, Cheon Ok JEONG
  • Publication number: 20210064292
    Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method. The present disclosure may divide user data and map data corresponding to the user data into data segments, may input the data segments in N virtual die queues, and may program the same in a memory device, wherein a user data segment input in the virtual die queue is programmed according to two program schemes, thereby quickly programming the user data and the map data in the memory device and quickly updating the map data in a map cache.
    Type: Application
    Filed: March 13, 2020
    Publication date: March 4, 2021
    Inventors: Young Guen CHOI, Dong Ham YIM, Dae Hoon JANG, Young Hoon CHA