Patents by Inventor Young-hun Bae

Young-hun Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7605069
    Abstract: A method for fabricating a semiconductor device with a gate is provided. The method includes: forming a gate insulation layer over a substrate; sequentially forming a polysilicon layer, a silicide layer and a hard mask layer over the gate insulation layer; selectively patterning the hard mask layer; etching the silicide layer using the patterned hard mask layer as a mask such that the silicide layer has a cross-sectional etch profile that is negatively sloped; etching the polysilicon layer using the patterned hard mask layer as a mask to form a gate; and performing a light oxidation process to oxidize exposed sidewalls of the polysilicon layer and the silicide layer.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: October 20, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Tae-Woo Jung, Young-Hun Bae
  • Publication number: 20070004213
    Abstract: A method for fabricating a semiconductor device with a gate is provided. The method includes: forming a gate insulation layer over a substrate; sequentially forming a polysilicon layer, a silicide layer and a hard mask layer over the gate insulation layer; selectively patterning the hard mask layer; etching the silicide layer using the patterned hard mask layer as a mask such that the silicide layer has a cross-sectional etch profile that is negatively sloped; etching the polysilicon layer using the patterned hard mask layer as a mask to form a gate; and performing a light oxidation process to oxidize exposed sidewalls of the polysilicon layer and the silicide layer.
    Type: Application
    Filed: February 23, 2006
    Publication date: January 4, 2007
    Inventors: Tae-Woo Jung, Young-Hun Bae
  • Patent number: 6716760
    Abstract: A method for forming a gate of a high integration semiconductor device in which, when forming a gate electrode on a semiconductor substrate by depositing a nitride layer and an anti-reflection layer after depositing a conductive layer constructed by a gate oxide layer, a polysilicon layer, a tungsten nitride layer and a tungsten layer, an etch prevention layer is formed between the nitride layer and the anti-reflection layer in order to prevent the nitride layer from over-etching, thereby preventing the leakage current, caused by the bridge formed between the gate and the bit line, from generating.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: April 6, 2004
    Assignee: Hynix Semiconductor Inc
    Inventors: Young-hun Bae, Won-sung Park
  • Publication number: 20020093066
    Abstract: A method for forming a gate of a high integration semiconductor device in which, when forming a gate electrode on a semiconductor substrate by depositing a nitride layer and an anti-reflection layer after depositing a conductive layer constructed by a gate oxide layer, a polysilicon layer, a tungsten nitride layer and a tungsten layer, an etch prevention layer is formed between the nitride layer and the anti-reflection layer in order to prevent the nitride layer from over-etching, thereby preventing the leakage current, caused by the bridge formed between the gate and the bit line, from generating.
    Type: Application
    Filed: August 27, 2001
    Publication date: July 18, 2002
    Inventors: Young-Hun Bae, Won-Sung Park
  • Publication number: 20010005622
    Abstract: A method for manufacturing a gate electrode, the method including the steps of forming upon a semiconductor substrate a polysilicon layer, a metal nitride layer, a tungsten layer and a photoresist layer, patterning the photoresist layer on the tungsten layer into a predetermined configuration, etching the tungsten layer, the metal nitride layer, a portion of the polysilicon layer into the predetermined configuration by using a mixed etchant of fluorine and chlorine species etchant, and patterning the remaining polysilicon layer into the predetermined configuration by using chlorine etchant.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 28, 2001
    Inventors: Jun-Dong Kim, Young-Hun Bae, Tae-Woo Jung, Dong-Duk Lee