Abstract: A memory device includes a plurality of memory planes, each including a plurality of memory banks; one or more plane groups, each comprising at least two memory planes sharing at least one peripheral circuit; a plurality of compressing circuits, each connected to a corresponding memory bank and outputting compressed data by compressing data read from the corresponding memory bank; a plurality of merge circuits, each receiving compressed data and at least one output control signal corresponding to a merge group of a plurality of merge groups, each merge circuit outputting, in response to at least one output control signal, merged data obtained by merging compressed data corresponding to memory banks grouped in the merge group; and an output buffer circuit latching and outputting the merged data in response to at least one output control signal. The merge group comprises at least two memory banks in a same plane group.

Abstract: A column address generation circuit including: a command set conversion section configured to generate column address information on the basis of sector information included in a first command set synchronized with a first clock signal, and to output a second command set from the first command set by replacing information on column address cycles of the first clock signal with the column address information in response to a conversion signal; and a column address output section configured to output a column address on the basis of the second command set.

Abstract: The present invention relates to a method for forming a TiNO metallic barrier layer acting as a diffusion barrier to intercept the diffusing of the Si atoms between metal layers, the method comprising the steps of: forming a TiN film through a sputtering equipment using Ar and N.sub.2 gas; implanting N.sub.2 O gas on the upper part of the TiN film; and annealing the resulting structure at N.sub.2 atmosphere for diffusing oxygen ions, thereby forming said resulting structure into uniform TiNO film.