Abstract: The present disclosure relates to a method for preparing a mordenite zeolite, the method including crystallizing, at a temperature of 150° C. to 190° C., a gel which includes, in mol based on 1 mol of silica, 0.02 to 0.2 of an alumina precursor, 0.01 to 0.04 of a structure-directing agent, 0.1 to 0.18 of a pH control agent, and 10 to 100 of water. According to the present disclosure, a mordenite zeolite having high particle size uniformity and a particle size controllable while maintaining the particle size uniformity may be prepared.

Abstract: The method for fabricating a capacitor forms a lower electrode of a capacitor over a substrate, adds impurity ions to upper portions of the lateral surfaces; and forms HSG-Si on surfaces of the lower electrode except the upper portions of the lateral surfaces.

Abstract: The method for fabricating a capacitor forms a lower electrode of a capacitor over a substrate, adds impurity ions to upper portions of the lateral surfaces; and forms HSG-Si on surfaces of the lower electrode except the upper portions of the lateral surfaces.

Abstract: The method for fabricating a capacitor forms a lower electrode of a capacitor over a substrate, adds impurity ions to upper portions of the lateral surfaces; and forms HSG-Si on surfaces of the lower electrode except the upper portions of the lateral surfaces.

Abstract: This invention relates to thin film transistors having a sloped drain region suitable for high integrated elements and the method for fabricating the same. The thin film transistor comprising a substrate, a gate pole formed on the central part of the substrate, a semiconductor layer formed to surround the gate pole on the substrate, a side wall spacer formed at one side of the gate pole on the semiconductor layer, and high density impurity regions formed in the semiconductor layer on both sides of the gate pole. The method for fabricating a TFT comprising steps for forming a gate pole on the central part of a substrate, forming a gate insulation film and a semiconductor layer successively on all over the surface of the substrate, forming a side wall spacer only at one side of the gate pole on the semiconductor layer, and forming high density impurity regions in the semiconductor layer on both sides of the gate by ion injecting impurity ions into the semiconductor layer.

Abstract: A method for fabricating Thin Film Transistors includes the steps of forming a gate electrode on a substrate, forming a gate insulation film and a semiconductor layer successively on the substrate, forming a sidewall spacer only at one sidewall of the gate electrode on the semiconductor layer, and forming impurity regions in the semiconductor layer on both sidewalls of the gate electrode by ion-injecting impurity ions into the semiconductor layer.