Abstract: Provided is a method of determining a mission of a device in an electronic device, including identifying external situation information and status information of a plurality of devices, identifying an object function related to a degree of fitness of a device for a mission, for each set of a plurality of solutions of a first generation for the plurality of devices, calculating a value of the object function using the external situation information and the status information, based on the value, determining a set of a plurality of solutions of a next generation for the plurality of devices through a genetic algorithm (GA), and based on a first solution from a set of a plurality of solutions of a second generation by repeating the calculating the value and the determining the set of the plurality of solutions of the next generation, determining a mission for the plurality of devices.

Abstract: A bitline sense amplifier including: an amplifier which is connected between a first sensing bitline and a second sensing bitline, and detects and amplifies a voltage difference between a first bitline and a second bitline in response to a first control signal and a second control signal; and an equalizer which is connected between a first supply line through which the first control signal is supplied and a second supply line through which the second control signal is supplied, and pre-charges the first bitline and the second bitline with a precharge voltage in response to an equalizing control signal, wherein the equalizer includes an equalizing enable transistor in which a source terminal is connected to the first supply line and performs equalizing in response to the equalizing control signal.

Abstract: A bitline sense amplifier including: an amplifier which is connected between a first sensing bitline and a second sensing bitline, and detects and amplifies a voltage difference between a first bitline and a second bitline in response to a first control signal and a second control signal; and an equalizer which is connected between a first supply line through which the first control signal is supplied and a second supply line through which the second control signal is supplied, and pre-charges the first bitline and the second bitline with a precharge voltage in response to an equalizing control signal, wherein the equalizer includes an equalizing enable transistor in which a source terminal is connected to the first supply line and performs equalizing in response to the equalizing control signal.

Abstract: A memory device includes an anti-fuse cell array including a plurality of anti-fuse cells. Each anti-fuse cell includes a first cell transistor connected to a common node, a second cell transistor connected to the common node, and an access transistor connected to the common node. The first cell transistor is configured to store data and the second cell transistor is configured to store data when the first cell transistor has defect data.

Abstract: A method of operating a memory device includes masking at least one bank among a plurality of banks in response to a mode register writing command; and performing a refresh operation on a plurality of rows in one of unmasked banks in response to a first per-bank refresh command.

Abstract: A method of operating a memory device includes masking at least one bank among a plurality of banks in response to a mode register writing command; and performing a refresh operation on a plurality of rows in one of unmasked banks in response to a first per-bank refresh command.

Abstract: A method for controlling an overload of a digital mobile communication system. The digital mobile communication system has a base transceiver station and a base station controller each of which has a database.

Abstract: A method for controlling an overload of a digital mobile communication system. The digital mobile communication system has a base transceiver station and a base station controller each of which has a database.