Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, start position information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.

Abstract: A local watch skew compensation device of the present invention is a client device which is synchronized with the other client device to provide a time-aware service including: a local time providing unit which supplies first local time data and second local time data in accordance with a local clock; a media scheduling unit which receives first media data and second media data from the other client device, schedules first playout time of the first media data using the first local time data, and schedules second playout time of the second media data using the second local time data; and a skew monitoring unit which requests global time data to a global time server when a difference between the first playout time and the second playout time exceeds a skew threshold value, and the first media data and the second media data are different types of media data.

Abstract: Disclosed are an electric vehicle capable of improving the charging efficiency of a charging apparatus by reducing the switching loss that may occur in the charging apparatus of an electric vehicle and a charging apparatus thereof. To this end, a power factor correction apparatus of an on board charger includes a first boost circuit receiving AC power through a first inductor to charge a load, a second boost circuit receiving the AC power through a second inductor to charge the load, and a third inductor provided between a leg of the first boost circuit and a leg of the second boost circuit so that parasitic capacitors of the first boost circuit and the second boost circuit are discharged.

Abstract: Disclosed is a display apparatus including a plurality of display modules and a frame to detachably mount the plurality of display modules thereon, the frame including guide bars on which the display module includes guide bars are mounted to be movable in a horizontal direction, so that a screen is physically separated or joined.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

Abstract: A method for controlling a memory from which data is transferred to a neural network processor and an apparatus thereof are provided, the method including: generating prefetch information of data by using a blob descriptor and a reference prediction table after history information is input; reading the data in the memory based on the pre-fetch information and temporarily archiving read data in a prefetch buffer; and accessing next data in the memory based on the prefetch information and temporarily archiving the next data in the prefetch buffer after the data is transferred to the neural network from the prefetch buffer.

Abstract: Disclosed is a percutaneous absorption formulation containing melatonin which is a pharmacologically active substance useful for treating insomniac patients and sleep disorder patients.

Abstract: An MPEG media transport (MMT) apparatus and method for processing stereoscopic video data are provided. The MMT apparatus includes an asset file generator configured to generate a single asset file that contains an entire or part of the stereoscopic video data; and a signaling message generator configured to generate a signaling message for delivery or consumption of the stereoscopic video data. At least one of the generated single asset file and the generated signaling message contains stereoscopic video information related to the stereoscopic video data.

Abstract: The present invention relates to an acid-resistant yeast endowed with a lactic acid production ability and having a suppressed ethanol production pathway, and a method for producing lactic acid using same. According to the present invention, by effectively suppressing the production of ethanol in an acid-resistant yeast, and by expressing an LDH enzyme with strong expression and high efficiency, it is possible to produce lactic acid with high yield even at low pH without degrading growth.

Abstract: Disclosed is a pharmaceutical formulation containing esomeprazole or a pharmaceutically acceptable salt thereof. The pharmaceutical formulation, based on considerably improved pH-dependent drug release characteristics, starts to release the esomeprazole or a pharmaceutically acceptable salt thereof at a target delay time after oral administration, continues the release for a predetermined time, and finishes the release after a predetermined time, thereby providing excellent patient convenience and excellent therapeutic effects, as compared to conventional other formulations.

Abstract: An electronic device includes a main body; a flexible display to be rolled up and placed in the main body; a sensor configured to detect unrolling of the flexible display; and a controller configured. The controller is configured to control the flexible display to present information while the flexible display is exposed from the main body, and, based on detecting the flexible display being rolled into the main body while the information is presented, control to change a presentation position of the information on the flexible display according to the rolling of the flexible display.

Abstract: A system for manufacturing a lithium ion secondary battery includes an unwinder supplying a current collector to be coated to a predetermined position, a coating device coating a coating liquid on the current collector, a drying device drying the coated current collector, and a rewinder winding the coated current collector passing through the drying device at a predetermined position.

Abstract: A memory controller includes a first flash translation layer (FTL) generating a physical address corresponding to a first type logical address received from a host on the basis of information about the first memory blocks, a second FTL generating a physical address corresponding to a second type logical address received from the host on the basis of information about the second memory blocks, and a memory control unit controlling the first memory area or the second memory area to perform an operation on the physical address corresponding to the first type logical address or the physical address corresponding to the second type logical address, wherein the first FTL provides the second FTL with block request information for requesting use of the second memory blocks, and generates the physical address corresponding to the first type logical address received from the host on the basis of block allocation information provided by the second FTL.

Abstract: The present disclosure relates to a method for preparing a metal single-atom catalyst for a fuel cell. The method for preparing a metal single-atom catalyst uses a relatively lower amount of chemical substances as compared to the conventional methods and thus is eco-friendly, uses no liquid through the whole process and avoids a need for additional steps for separating and/or washing the catalyst after its synthesis, thereby allowing simplification of the process, and can produce a single-atom catalyst at low cost. In addition, unlike the conventional methods having a limitation in metallic materials, the method can be applied in common regardless of types of metals, and thus is significantly advantageous in that it can be applied widely to obtain various types of metal single-atom catalysts. Further, in the method for preparing a metal single-atom catalyst, metal atoms totally participate in the reaction. Thus, the method can minimize the usage of metal to provide high cost-efficiency.

Abstract: An electrode assembly, in which a positive electrode, a separator, and a negative electrode are repeatedly stacked includes a shrinkage film made of a material having a thermal shrinkage rate greater than that of the separator, the shrinkage film being shrunk in area at a specific temperature or more, wherein the shrinkage film is disposed instead of the separator at one or more positions between the positive electrode and the negative electrode so that, when the shrinkage film is shrunk by an increase of a temperature, the positive electrode and the negative electrode, which are adjacent to each other with the shrinkage film therebetween, partially contact each other to generate microcurrent.

Abstract: A device for managing applications installed on the device and a method thereof are provided. The device includes a controller configured to obtain driving information of the applications in response to the applications being executed, and determine an application satisfying an uninstall condition, among the applications, based on the driving information. The device further includes an interface configured to change a display of an object indicating the determined application, based on the uninstall condition.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Abstract: An inter-prediction method and apparatus uses a reference frame generated based on deep learning. In the inter-prediction method and apparatus, a reference frame is selected, and a virtual reference frame is generated based on the selected reference frame. A reference picture list is configured to include the generated virtual reference frame, and inter prediction for a target block is performed based on the virtual reference frame. The virtual reference frame may be generated based on a deep-learning network architecture, and may be generated based on video interpolation and/or video extrapolation that use the selected reference frame.

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.