Patents by Inventor Young-jo Tak

Young-jo Tak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180174823
    Abstract: A method of manufacturing a gallium nitride substrate, the method including forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a second buffer layer on the first buffer layer such that the second buffer layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer.
    Type: Application
    Filed: July 28, 2017
    Publication date: June 21, 2018
    Inventors: Mi Hyun KIM, Sam Mook KANG, Jun Youn KIM, Young Jo TAK
  • Publication number: 20180166302
    Abstract: In a method of forming a nitride semiconductor substrate, a nitride semiconductor substrate may be formed on a silicon substrate. A protection layer may be formed to cover a surface of the nitride semiconductor substrate. The silicon substrate may be removed by an etching process. The protection layer may limit and/or prevent the nitride semiconductor substrate from being etched during the etching process.
    Type: Application
    Filed: June 1, 2017
    Publication date: June 14, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sam-Mook KANG, Mi-Hyun KIM, Jun-Youn KIM, Young-Jo TAK
  • Publication number: 20180112330
    Abstract: In a method of manufacturing a GaN substrate, a capping layer may be formed on a first surface of a silicon substrate. A buffer layer may be formed on a second surface of the silicon substrate. The second surface may be opposite the first surface. A GaN substrate may be formed on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process. The capping layer and the silicon substrate may be removed.
    Type: Application
    Filed: March 29, 2017
    Publication date: April 26, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Mi-Hyun KIM, Sam-Mook KANG, Jun-Youn KIM, Young-Jo TAK, Young-Soo PARK
  • Patent number: 9947530
    Abstract: A method of manufacturing a nitride semiconductor substrate includes providing a silicon substrate having a first surface and a second surface opposing each other, growing a nitride template on the first surface of the silicon substrate in a first growth chamber, in which a silicon compound layer is formed on the second surface of the silicon substrate in a growth process of the nitride template, removing the silicon compound layer from the second surface of the silicon substrate, growing a group III nitride single crystal on the nitride template in a second growth chamber, and removing the silicon substrate from the second growth chamber.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 17, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Jo Tak, Sam Mook Kang, Mi Hyun Kim, Jun Youn Kim, Young Soo Park
  • Patent number: 9899565
    Abstract: A method of manufacturing a semiconductor substrate may include forming a first semiconductor layer on a growth substrate, forming a second semiconductor layer on the first semiconductor layer, forming a plurality of voids in the first semiconductor layer by removing portions of the first semiconductor layer that are exposed by a plurality of trenches in the second semiconductor layer, forming a third semiconductor layer on the second semiconductor layer and covering the plurality of trenches, and separating the second and third semiconductor layers from the growth substrate. on the first semiconductor layer. The third semiconductor layer are grown from the second semiconductor layer and extend above the second semiconductor layer.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Jo Tak, Sam Mook Kang, Mi Hyun Kim, Jun Youn Kim, Young Soo Park, Misaichi Takeuchi
  • Publication number: 20180030617
    Abstract: An apparatus includes a deposition chamber housing that accommodates a growth substrate, a supply nozzle to supply a deposition gas for forming a target large-size substrate on the growth substrate into the deposition chamber housing, a susceptor to support the growth substrate and expose a rear surface of the growth substrate to an etch gas, and an inner liner connected to the susceptor. The inner liner is to isolate the etch gas from the deposition gas and guide the etch gas toward the rear surface of the growth substrate. The susceptor includes a center hole that exposes the rear surface of the growth substrate and a support protrusion supporting the growth substrate, the support protrusion protruding toward the center of the center hole from an inner sidewall of the susceptor defining the center hole.
    Type: Application
    Filed: July 5, 2017
    Publication date: February 1, 2018
    Inventors: Sam-mook KANG, Jun-youn KIM, Young-jo TAK, Mi-hyun KIM, Young-soo PARK
  • Publication number: 20170358443
    Abstract: A method of manufacturing a nitride semiconductor substrate includes providing a silicon substrate having a first surface and a second surface opposing each other, growing a nitride template on the first surface of the silicon substrate in a first growth chamber, in which a silicon compound layer is formed on the second surface of the silicon substrate in a growth process of the nitride template, removing the silicon compound layer from the second surface of the silicon substrate, growing a group III nitride single crystal on the nitride template in a second growth chamber, and removing the silicon substrate from the second growth chamber.
    Type: Application
    Filed: January 6, 2017
    Publication date: December 14, 2017
    Inventors: Young Jo TAK, Sam Mook KANG, Mi Hyun KIM, Jun Youn KIM, Young Soo PARK
  • Patent number: 9666754
    Abstract: A method of manufacturing a semiconductor substrate may include: forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer including filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Hwan Park, Sam Mook Kang, Jun Youn Kim, Mi Hyun Kim, Joo Sung Kim, Young Jo Tak
  • Publication number: 20170069785
    Abstract: A method of manufacturing a semiconductor substrate may include forming a first semiconductor layer on a growth substrate, forming a second semiconductor layer on the first semiconductor layer, forming a plurality of voids in the first semiconductor layer by removing portions of the first semiconductor layer that are exposed by a plurality of trenches in the second semiconductor layer, forming a third semiconductor layer on the second semiconductor layer and covering the plurality of trenches, and separating the second and third semiconductor layers from the growth substrate. on the first semiconductor layer. The third semiconductor layer are grown from the second semiconductor layer and extend above the second semiconductor layer.
    Type: Application
    Filed: June 16, 2016
    Publication date: March 9, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young Jo TAK, Sam Mook KANG, Mi Hyun KIM, Jun Youn KIM, Young Soo PARK, Misaichi TAKEUCHI
  • Patent number: 9583340
    Abstract: Provided are a semipolar nitride semiconductor structure and a method of manufacturing the same. The semipolar nitride semiconductor structure includes a silicon substrate having an Si(11k) surface satisfying 7?k?13; and a nitride semiconductor layer formed on the silicon substrate. The nitride semiconductor layer has a semipolar characteristic in which a polarization field is approximately 0.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: February 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Youn Kim, Jae-Kyun Kim, Joo-Sung Kim, Young-Soo Park, Young-Jo Tak
  • Publication number: 20160351748
    Abstract: A method of manufacturing a semiconductor substrate may include: forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer including filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.
    Type: Application
    Filed: April 15, 2016
    Publication date: December 1, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Hwan PARK, Sam Mook KANG, Jun Youn KIM, Mi Hyun KIM, Joo Sung KIM, Young Jo TAK
  • Patent number: 9449817
    Abstract: A semiconductor device includes a substrate, a buffer layer on the substrate, and a plurality of nitride semiconductor layers on the buffer layer. The semiconductor device further includes at least one masking layer and at least one inter layer between the plurality of nitride semiconductor layers. The at least one inter layer is on the at least one masking layer.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: September 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jo Tak, Jae-won Lee, Young-soo Park, Jun-youn Kim
  • Patent number: 9337381
    Abstract: A semiconductor buffer structure includes a silicon substrate, a nucleation layer formed on the silicon substrate, and a buffer layer formed on the nucleation layer. The buffer layer includes a first layer formed of a nitride semiconductor material having a uniform composition rate, a second layer formed of the same material as the nucleation layer on the first layer, and a third layer formed of the same material with the same composition ratio as the first layer on the second layer.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: May 10, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Young-jo Tak, Jae-kyun Kim, Joo-sung Kim, Young-soo Park, Su-hee Chae
  • Patent number: 9257599
    Abstract: According to example embodiments, a semiconductor light emitting device includes a first semiconductor layer, a pit enlarging layer on the first semiconductor layer, an active layer on the pit enlarging layer, a hole injection layer, and a second semiconductor layer on the hole injection layer. The first semiconductor layer is doped a first conductive type. An upper surface of the pit enlarging layer and side surfaces of the active layer define pits having sloped surfaces on the dislocations. The pits are reverse pyramidal spaces. The hole injection layer is on a top surface of the active layer and the sloped surfaces of the pits. The second semiconductor layer doped a second conductive type that is different than the first conductive type.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: February 9, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-kyun Kim, Joo-sung Kim, Jun-youn Kim, Young-soo Park, Young-jo Tak
  • Patent number: 9202878
    Abstract: A gallium nitride based semiconductor device includes a silicon-based layer doped simultaneously with boron (B) and germanium (Ge) at a relatively high concentration, a buffer layer on the silicon-based layer, and a nitride stack on the buffer layer. A doping concentration of boron (B) and germanium (Ge) may be higher than 1×1019/cm3.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: December 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jo Tak, Jae-kyun Kim, Jun-youn Kim, Jae-won Lee, Hyo-ji Choi
  • Patent number: 9190270
    Abstract: Provided are a low-defect semiconductor device and a method of manufacturing the same. The method includes forming a buffer layer on a silicon substrate, forming an interface control layer on the buffer layer under a first growth condition, and forming a nitride stack on the interface control layer under a second growth condition different from the first growth condition.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: November 17, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-jo Tak, Jae-kyun Kim, Joo-sung Kim, Jun-youn Kim, Young-soo Park, Eun-ha Lee
  • Patent number: 9136430
    Abstract: A method of manufacturing a semiconductor device includes forming a silicon substrate, forming a buffer layer on the silicon substrate, and forming a nitride semiconductor layer on the buffer layer. The buffer layer includes a first layer, a second layer, and a third layer. The first layer includes AlxInyGa1-x-yN (0?x?1, 0?y?1, 0?x+y?1) and has a lattice constant LP1 that is smaller than a lattice constant LP0 of the silicon substrate. The second layer is formed on the first layer, includes AlxInyGa1-x-yN (0?x<1, 0?y<1, 0?x+y<1), and has a lattice constant LP2 that is greater than LP1 and smaller than LP0. The third layer is formed on the second layer, includes AlxInyGa1-x-yN (0?x<1, 0?y<1, 0?x+y<1), and has a lattice constant LP3 that is smaller than LP2.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: September 15, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-jo Tak, Jae-kyun Kim, Joo-sung Kim, Jun-youn Kim, Jae-won Lee, Hyo-ji Choi
  • Publication number: 20150123140
    Abstract: Provided are a semipolar nitride semiconductor structure and a method of manufacturing the same. The semipolar nitride semiconductor structure includes a silicon substrate having an Si(11k) surface satisfying 7?k?13; and a nitride semiconductor layer formed on the silicon substrate. The nitride semiconductor layer has a semipolar characteristic in which a polarization field is approximately 0.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 7, 2015
    Inventors: Jun-Youn KIM, Jae-Kyun KIM, Joo-Sung KIM, Young-Soo PARK, Young-Jo TAK
  • Publication number: 20150118800
    Abstract: A semiconductor device includes a substrate, a buffer layer on the substrate, and a plurality of nitride semiconductor layers on the buffer layer. The semiconductor device further includes at least one masking layer and at least one inter layer between the plurality of nitride semiconductor layers. The at least one inter layer is on the at least one masking layer.
    Type: Application
    Filed: December 30, 2014
    Publication date: April 30, 2015
    Inventors: Young-jo TAK, Jae-won LEE, Young-soo PARK, Jun-youn KIM
  • Publication number: 20150111369
    Abstract: A semiconductor buffer structure includes a silicon substrate, a nucleation layer formed on the silicon substrate, and a buffer layer formed on the nucleation layer. The buffer layer includes a first layer formed of a nitride semiconductor material having a uniform composition rate, a second layer formed of the same material as the nucleation layer on the first layer, and a third layer formed of the same material with the same composition ratio as the first layer on the second layer.
    Type: Application
    Filed: September 12, 2014
    Publication date: April 23, 2015
    Inventors: Jun-youn KIM, Young-jo TAK, Jae-kyun KIM, Joo-sung KIM, Young-soo PARK, Su-hee CHAE