Patents by Inventor Young-Joon Rhee

Young-Joon Rhee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7973886
    Abstract: Thin film transistors are formed on a lower substrate, and red, green, blue and transparent color filters are formed thereon. An organic insulating layer is formed on the color filters, and pixel electrodes are formed thereon. A black matrix and a common electrode are formed on an upper substrate facing the lower substrate.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Dong-Ho Lee, Chung-Hyo Lee
  • Patent number: 7883942
    Abstract: Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a-Si layer, an extrinsic a-Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a-Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a-Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: February 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Gee Baek, Kwon-Young Choi, Young-Joon Rhee, Bong-Joo Kang, Seung-Taek Lim, Hyang-Shik Kong, Won-Joo Kim
  • Patent number: 7659130
    Abstract: A gate conductor including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between the to be formed source electrode and drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data conductor including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for a storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: February 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Jong-Soo Yoon
  • Publication number: 20090244450
    Abstract: Thin film transistors are formed on a lower substrate, and red, green, blue and transparent color filters are formed thereon. An organic insulating layer is formed on the color filters, and pixel electrodes are formed thereon. A black matrix and a common electrode are formed on an upper substrate facing the lower substrate.
    Type: Application
    Filed: May 28, 2009
    Publication date: October 1, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Joon Rhee, Dong-Ho Lee, Chung-Hyo Lee
  • Patent number: 7542112
    Abstract: Thin film transistors are formed on a lower substrate, and red, green, blue and transparent color filters are formed thereon. An organic insulating layer is formed on the color filters, and pixel electrodes are formed thereon. A black matrix and a common electrode are formed on an upper substrate facing the lower substrate.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: June 2, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Dong-Ho Lee, Chung-Hyo Lee
  • Patent number: 7436479
    Abstract: A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: October 14, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Jae Park, Young-Joon Rhee, Hyeong-Jun Park, Hyang-Shik Kong
  • Patent number: 7394099
    Abstract: A thin film transistor array panel is provided, which includes: a gate line; first and second data lines insulated from the gate line; a thin film transistor connected to the gate line and the first data line; a pixel electrode disposed between the first data line and the second data line, spaced apart from the first and the second data lines, and coupled to the thin film transistor; and first and second projections connected to the pixel electrode and overlapping the first and the second data lines, respectively.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: July 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Jae Park, Hyang-Shik Kong, Young-Joon Rhee, Hyeong-Jun Park
  • Publication number: 20080044996
    Abstract: Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a—Si layer, an extrinsic a—Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a—Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a—Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Bum-Gee BAEK, Kwon-Young CHOI, Young-Joon RHEE, Bong-Joo KANG, Seung-Taek LIM, Hyang-Shik KONG, Won-Joo KIM
  • Patent number: 7294855
    Abstract: Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a-Si layer, an extrinsic a-Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a-Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a-Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Gee Baek, Kwon-Young Choi, Young-Joon Rhee, Bong-Joo Kang, Seung-Taek Lim, Hyang-Shik Kong, Won-Joo Kim
  • Publication number: 20070211201
    Abstract: A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
    Type: Application
    Filed: May 11, 2007
    Publication date: September 13, 2007
    Inventors: Myung-Jae PARK, Young-Joon Rhee, Hyeong-Jun Park, Hyang-Shik Kong
  • Patent number: 7221423
    Abstract: A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: May 22, 2007
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Myung-Jae Park, Young-Joon Rhee, Hyeong-Jun Park, Hyang-Shik Kong
  • Publication number: 20060252168
    Abstract: A gate conductor including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between the to be formed source electrode and drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data conductor including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for a storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.
    Type: Application
    Filed: July 12, 2006
    Publication date: November 9, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Joon Rhee, Jong-Soo Yoon
  • Publication number: 20060232721
    Abstract: A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on the presence of an organic insulating layer.
    Type: Application
    Filed: June 12, 2006
    Publication date: October 19, 2006
    Inventors: Yoon-Sung Um, Nak-cho Choi, Jae-Jin Lyu, Jeong-Ho Lee, Young-Joon Rhee, Myung-Jae Park, Jang-Kun Song
  • Patent number: 7102168
    Abstract: A gate wire including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between a source electrode and a drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data wire including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: September 5, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Jong-Soo Yoon
  • Patent number: 7079210
    Abstract: A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on the presence of an organic insulating layer.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: July 18, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Sung Um, Nak-cho Choi, Jae-Jin Lyu, Jeong-Ho Lee, Young-Joon Rhee, Myung-Jae Park, Jang-Kun Song
  • Patent number: 7019806
    Abstract: A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on thickness of the liquid crystal layer.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: March 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Sung Um, Nak-cho Choi, Jae-Jin Lyu, Jeong-Ho Lee, Young-Joon Rhee, Myung-Jae Park, Jang-Kun Song
  • Publication number: 20060007365
    Abstract: A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on the presence of an organic insulating layer.
    Type: Application
    Filed: September 16, 2005
    Publication date: January 12, 2006
    Inventors: Yoon-Sung Um, Nak-cho Choi, Jae-Jin Lyu, Jeong-Ho Lee, Young-Joon Rhee, Myung-Jae Park, Jang-Kun Song
  • Publication number: 20060007086
    Abstract: A signal transmission film includes a conductive pattern having a resin-extruding path making contact with an anisotropic conductive film including a resin so that the resin is extruded through the resin-extruding path for providing a stable connection. Alternatively, the resin-extruding path is provided in a signal providing pattern on a display panel. Also, a flexible printed circuit includes a gate driving terminal having at least two sub terminals electrically connected to each other. Each of the sub terminals is electrically connected to a gate driving control signal pad of a liquid crystal display panel for enhancing contact stability.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 12, 2006
    Inventors: Young-Joon Rhee, Kwang-Soo Lee, Yang-Suk Ahn, Gwan-Sik Yoon, Hee-Jae Park, Jin-Ho Park, Hee-Bum Park, Ock-Jin Kim
  • Patent number: 6940573
    Abstract: A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on thickness of the liquid crystal layer.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: September 6, 2005
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Yoon-Sung Um, Nak-cho Choi, Jae-Jin Lyu, Jeong-Ho Lee, Young-Joon Rhee, Myung-Jae Park, Jang-Kun Song
  • Publication number: 20050134779
    Abstract: A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
    Type: Application
    Filed: November 17, 2004
    Publication date: June 23, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Jae Park, Young-Joon Rhee, Hyeong-Jun Park, Hyang-Shik Kong