Abstract: Some novel features pertain to a capacitor structure that includes a first conductive layer, a second conductive layer and a non-conductive layer. The first conductive layer has a first overlapping portion and a second overlapping portion. The second conductive layer has a third overlapping portion, a fourth overlapping portion, and a non-overlapping portion. The third overlapping portion overlaps with the first overlapping portion of the first conductive layer. The fourth overlapping portion overlaps with the second overlapping portion of the first conductive layer. The non-overlapping portion is free of any overlap (e.g., vertical overlap) with the first conductive layer. The non-conductive layer separates the first and second conductive layers. The non-conductive layer electrically insulates the third overlapping portion and the fourth overlapping portion from the first conductive layer.

Abstract: A method and apparatus for testing near field magnetic fields of electronic devices. The method comprises measuring a magnetic field using a loop antenna that is oriented in a first direction. The loop antenna is swept through a desired range of azimuth angles while measuring the magnetic field. Once the first direction testing is completed, the loop antenna is changed to a second orientation direction. The magnetic field is then measured in the second orientation direction and is swept through a desired range of orientation angles in the second direction. The apparatus provides a loop antenna connected to a coaxial probe, with the coaxial cable serving as the center conductor, and two outer conductors. An axle is mounted to the loop antenna and connected to a step motor. A servo motor is also provided for moving the arm assembly.

Abstract: Systems and methods for EMC, EMI and ESD testing are described. A probe comprises a center conductor extending along an axis of the probe, a probe tip, and a shield coaxially aligned with the center conductor and configured to provide electromagnetic screening for the probe tip. One or more actuators may change the relative positions of the probe tip and shield with respect to a device under test, thereby enabling control of sensitivity and resolution of the probe.

Abstract: Some novel features pertain to a first example provides a semiconductor device that includes a printed circuit board (PCB), asset of solder balls and a die. The PCB includes a first metal layer. The set of solder balls is coupled to the PCB. The die is coupled to the PCB through the set of solder balls. The die includes a second metal layer and a third metal layer. The first metal layer of the PCB, the set of solder balls, the second and third metal layers of the die are configured to operate as an inductor in the semiconductor device. In some implementations, the die further includes a passivation layer. The passivation layer is positioned between the second metal layer and the third metal layer. In some implementations, the second metal layer is positioned between the passivation layer and the set of solder balls.

Abstract: A method and apparatus for testing near field magnetic fields of electronic devices. The method comprises measuring a magnetic field using a loop antenna that is oriented in a first direction. The loop antenna is swept through a desired range of azimuth angles while measuring the magnetic field. Once the first direction testing is completed, the loop antenna is changed to a second orientation direction. The magnetic field is then measured in the second orientation direction and is swept through a desired range of orientation angles in the second direction. The apparatus provides a loop antenna connected to a coaxial probe, with the coaxial cable serving as the center conductor, and two outer conductors. An axle is mounted to the loop antenna and connected to a step motor. A servo motor is also provided for moving the arm assembly.

Abstract: A method and apparatus for testing integrated circuit resistors includes applying a variable source current to a resistive device under test (DUT), measuring the resistance of the resistive DUT as a function of the source current, and fitting the measured resistance to parameters of a polynomial parametric equation, wherein the parametric equation comprises a constant resistance at zero current bias plus a second order current coefficient of resistance multiplied by the square of the current.

Abstract: Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer.

Abstract: Some novel features pertain to a first example provides a semiconductor device that includes a printed circuit board (PCB), asset of solder balls and a die. The PCB includes a first metal layer. The set of solder balls is coupled to the PCB. The die is coupled to the PCB through the set of solder balls. The die includes a second metal layer and a third metal layer. The first metal layer of the PCB, the set of solder balls, the second and third metal layers of the die are configured to operate as an inductor in the semiconductor device. In some implementations, the die further includes a passivation layer. The passivation layer is positioned between the second metal layer and the third metal layer. In some implementations, the second metal layer is positioned between the passivation layer and the set of solder balls.

Abstract: One feature pertains to a multi-layer package substrate of an integrated circuit package that comprises a discrete circuit component (DCC) having at least one electrode. The DCC is embedded within an insulator layer, and a via coupling component electrically couples to the electrode. A first portion of the via coupling component extends beyond a first edge of the electrode, and a plurality of vias each having a first end couple to the first via coupling component. At least a first via of the plurality of vias couples to the first portion of the via coupling component that extends beyond the first edge of the electrode. Moreover, the plurality of vias each have a second end that electrically couple to a first outer metal layer, and at least a second portion of the via coupling component is positioned within a first inner metal layer.

Abstract: Systems and methods for EMC, EMI and ESD testing are described. A probe comprises a center conductor extending along an axis of the probe, a probe tip, and a shield coaxially aligned with the center conductor and configured to provide electromagnetic screening for the probe tip. One or more actuators may change the relative positions of the probe tip and shield with respect to a device under test, thereby enabling control of sensitivity and resolution of the probe.