Abstract: A multilayer ceramic capacitor may include: a ceramic body; first and second external electrodes disposed on a mounting surface of the ceramic body; third and fourth external electrodes disposed on a surface of the ceramic body opposing the mounting surface; a first active layer including first and second internal electrodes alternately exposed through the mounting surface of the ceramic body and the surface of the ceramic body opposing the mounting surface and connected to the first and third external electrodes, respectively; a second active layer including third and fourth internal electrodes alternately exposed through the mounting surface of the ceramic body and the surface of the ceramic body opposing the mounting surface and connected to the second and fourth external electrodes, respectively; and an intermittent part disposed on the surface of the ceramic body opposing the mounting surface and connecting the third and fourth external electrodes to each other.

Abstract: A resistor element includes a base substrate, a resistor layer disposed on one surface of the base substrate, a first electrode layer and a second electrode layer disposed on the resistor layer spaced apart from each other, a third electrode layer disposed between the first electrode layer and the second electrode layer to be spaced apart from the first electrode layer and the second electrode layer and being thicker than each of the first electrode layer and the second electrode layer, and first to third plating layers disposed on the first to third electrode layers, respectively.

Abstract: A resistor element includes a base substrate, a resistor layer disposed on one surface of the base substrate, a first electrode layer and a second electrode layer disposed on the resistor layer to be spaced apart from each other, a third electrode layer disposed between the first electrode layer and the second electrode layer to be spaced apart from the first electrode layer and the second electrode layer, a conductive resin electrode disposed on at least one end of the third electrode layer, and first to third plating layers disposed on the first to third electrode layers, respectively.

Abstract: A resistor includes: a base substrate; a resistance layer disposed on one surface of the base substrate; first and second electrode layers disposed to be spaced apart from each other and covering portions of the resistance layer; and a third electrode layer disposed between the first and second electrode layers to be spaced apart from the first and second electrode layers and covering a portion of the resistance layer.

Abstract: A multilayer ceramic capacitor includes: a ceramic body; first and second internal electrodes disposed so as to be alternately exposed to both end surfaces of the ceramic body with each of dielectric layers; first and second external electrodes formed so as to be extended onto portions of one main surface of the ceramic body, respectively; third and fourth external electrodes formed on both side surfaces of the ceramic body, respectively, so as to be extended onto portions of both main surfaces of the ceramic body, respectively; an intermitting part connecting the third and fourth external electrodes to one another; first and second land patterns formed so as to be connected to the first and third external electrodes, respectively; and a third land pattern formed so as to be connected to both of the second and fourth external electrodes.

Abstract: A multi-terminal electronic component includes: a base material; a resistance layer disposed on a surface of the base material; a first terminal and a second terminal disposed to be spaced apart from each other while covering portions of the resistance layer, respectively; and a third terminal disposed between the first terminal and the second terminal and covering a portion of the resistance layer, wherein first and second side surfaces of the base material opposing each other are exposed from the first through third terminals.

Abstract: A multilayer ceramic capacitor may include: a ceramic body; first and second external electrodes disposed on a mounting surface of the ceramic body; third and fourth external electrodes disposed on a surface of the ceramic body opposing the mounting surface; a first active layer including first and second internal electrodes alternately exposed through the mounting surface of the ceramic body and the surface of the ceramic body opposing the mounting surface and connected to the first and third external electrodes, respectively; a second active layer including third and fourth internal electrodes alternately exposed through the mounting surface of the ceramic body and the surface of the ceramic body opposing the mounting surface and connected to the second and fourth external electrodes, respectively; and an intermittent part disposed on the surface of the ceramic body opposing the mounting surface and connecting the third and fourth external electrodes to each other.

Abstract: A resistance assembly for a mobile device and a manufacturing method thereof are disclosed. The resistance assembly for a mobile device in accordance with an aspect of the present invention includes: a substrate having a circuit formed thereon; first to fourth pads laminated and separated from one another on the substrate; first to fourth terminals connected to the first to fourth pads, respectively, by being formed in a longitudinal direction along edges of lateral surfaces of a resistance body that are opposite to each other; and first and second resistors formed in between the first to fourth terminals along the opposite lateral and connected in parallel to each other on the resistance body and configured to adjust electric current flowed into the circuit.

Abstract: A multilayer ceramic capacitor may include: a ceramic body; a plurality of first internal electrodes disposed in the ceramic body; a plurality of second internal electrodes stacked alternately with the first internal electrodes in the ceramic body; first and second external electrodes connected to the first internal electrodes, respectively; a third external electrode extended from one side surface of the ceramic body to a portion of a surface opposing a mounting surface of the ceramic body and connected to the second internal electrodes; a fourth external electrode extended from the other side surface of the ceramic body to a portion of the surface opposing the mounting surface of the ceramic body; and an intermitting part disposed on the surface opposing the mounting surface of the ceramic body and connecting the third and fourth external electrodes to each other.

Abstract: A resistance assembly for a mobile device and a manufacturing method thereof are disclosed. The resistance assembly for a mobile device in accordance with an embodiment of the present invention includes: a substrate having a circuit formed thereon; first to third pads laminated and separated from one another on the substrate; first to third terminals connected to the first to third pads, respectively; and first and second resistors formed between the first and second terminals and between the second and third terminals, respectively, and serially connected to each other and configured to adjust electric current flowed into the circuit.

Abstract: Disclosed herein is a chip resistor in which a plurality of resistor bodies are configured in a single chip in a limited space in an electronic product. The chip resistor includes: a substrate; electrodes formed on each side surface of the substrate; and resistor bodies connected to the electrodes and formed on upper and lower surfaces of the substrate, such that a production cost thereof may be significantly reduced.

Abstract: There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).

Abstract: There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).

Abstract: The present invention provides an array type chip resistor including: a substrate having a plurality of grooves formed on both sides thereof at equal spaces; lower electrodes formed on both sides of a bottom surface of the substrate; upper electrodes formed on both sides of a top surface of the substrate; side electrodes electrically connected to the upper and lower electrodes; a resistive element interposed between lower electrodes of the bottom surface of the substrate; a protection layer covered on the resistive element, the protection layer having both sides which cover a part of the lower electrodes and the resistive element; leveling electrodes being in contact with the lower electrodes exposed to outside of the protection layer; and a plating layer formed on the leveling electrodes.

Abstract: The present invention provides an array type chip resistor including: a substrate formed in a rectangular parallelepiped shape; lower electrodes disposed on both sides of a bottom surface of the substrate at equal spaces; side electrodes extended from some of lower electrodes, formed on outermost edges of both sides of the substrate, in all lower electrodes, to a side surface of the substrate; a resistive element interposed between lower electrodes of the bottom surface of the substrate; a protection layer covered on the resistive element, the protection layer having both sides which cover a part of the lower electrodes and the resistive element; leveling electrodes being in contact with the lower electrodes exposed to outside of the protection layer; and a plating layer formed on the leveling electrodes.

Abstract: Disclosed are a sound quality display apparatus, a sound quality display method, a computer readable medium on which a sound quality display program is recorded, and a sound camera. The apparatus includes a sound detector detecting sound generated from a sound source, a background photographing unit photographing background where the sound source is positioned, a sound source signal generator creating a sound source signal as a sound signal at a sound source plane where the sound source is positioned by analyzing the sound signal detected by the sound detector, a sound quality data generator creating sound quality data at the sound source plane by processing of the sound source signal, and a display displaying sound quality image data created by overlaying image data of the background photographed by the background photographing unit with the sound quality data.

Abstract: The present invention provides an array type chip resistor including: a substrate having a plurality of grooves formed on both sides thereof at equal spaces; lower electrodes formed on both sides of a bottom surface of the substrate; upper electrodes formed on both sides of a top surface of the substrate; side electrodes electrically connected to the upper and lower electrodes; a resistive element interposed between lower electrodes of the bottom surface of the substrate; a protection layer covered on the resistive element, the protection layer having both sides which cover a part of the lower electrodes and the resistive element; leveling electrodes being in contact with the lower electrodes exposed to outside of the protection layer; and a plating layer formed on the leveling electrodes.

Abstract: Disclosed are a sound quality display apparatus, a sound quality display method, a computer readable medium on which a sound quality display program is recorded, and a sound camera. The apparatus includes a sound detector detecting sound generated from a sound source, a background photographing unit photographing background where the sound source is positioned, a sound source signal generator creating a sound source signal as a sound signal at a sound source plane where the sound source is positioned by analyzing the sound signal detected by the sound detector, a sound quality data generator creating sound quality data at the sound source plane by processing of the sound source signal, and a display displaying sound quality image data created by overlaying image data of the background photographed by the background photographing unit with the sound quality data.