Abstract: A liquid crystal display panel where pixel cells defined by gate lines and data lines which are located to cross each other are arranged in a matrix shape, wherein each of the pixel cells includes a thin film transistor located at a crossing of the gate line and the data line, a pixel electrode connected to the thin film transistor, and a protrusion that overlaps a gate electrode of the thin film transistor to form a parasitic capacitor with the gate electrode and is connected to the pixel electrode, wherein each protrusion in the pixel cells of the liquid crystal display panel have an area determined in accordance with a location of the pixel cell in the liquid crystal display panel.

Abstract: A thin film transistor array panel is provided, which includes: a substrate; a plurality of first signal lines formed on the substrate; a plurality of second lines formed on the substrate, intersecting the first signal line, and including a plurality of curved portions having at least two curve points and a plurality of intermediate portions, the curved portions and the intermediate portions alternately connected; a plurality of pixel electrodes located substantially in areas defined by the first and the second signal lines; and a plurality of thin film transistors connected to the first and the second signal lines and the pixel electrodes.

Abstract: An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate.

Abstract: An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate.

Abstract: An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.

Abstract: A liquid crystal display is provided, which includes: a first substrate; a first signal line formed on the first substrate and extending in a first direction; a second signal line formed on the first substrate, intersecting the first signal line, and including a curved portion and a rectilinear portion connected to the curved portion; a first thin film transistor connected to the first signal line and the second signal line; a pixel electrode connected to the first thin film transistor; a second substrate facing the second substrate; and a common electrode formed on the second substrate and having an opening facing the second signal line.

Abstract: A thin film transistor array panel is provided, which includes: a substrate; a gate line formed on the substrate; first and second storage electrodes formed on the substrate and disposed opposite each other with respect to the gate line; a gate insulating layer formed in the gate line and the first and the second storage electrodes; a curved data line formed on the gate insulating layer; a thin film transistor connected to the gate line and the data line; a passivation layer formed on the data line and the thin film transistor; a pixel electrode formed on the passivation layer, connected to the thin film transistor, and having an obtuse corner and an acute corner; and an overpass cross over the gate line and connected to the first and the second storage electrodes.

Abstract: Provided is a multi-domain liquid crystal display device capable of improving a viewing angle by decreasing a color shift. The multi-domain LCD device includes a first substrate, a second substrate, a plurality of gate lines provided in one direction on the first substrate, a plurality of data lines provided substantially perpendicular to the plurality of gate lines to define a plurality of pixel regions including a first area and a second area, a common electrode and a pixel electrode which generate a parallel electric field within the first area to improve luminance, a common electrode and a pixel electrode which generate a parallel electric field within the second area to decrease color shift, and a liquid crystal layer formed between the first substrate and the second substrate.

Abstract: An exposure apparatus includes an optical system generating light, a mask, a light-absorbing member and a substrate plate. The mask includes a mask body disposed at a path of the light, a first light transmission pattern formed in a first region of the mask body, and a second light transmission pattern formed in a second region of the mask body. The mask is transported in a first direction. The light-absorbing member is disposed between the optical system and the mask, and has a diffusive reflection preventing part formed at a side surface of the light-absorbing member. The substrate plate supports a substrate having a photoresist layer formed thereon. The substrate plate is transported along the first direction together with the mask, thereby preventing a diffusive reflection.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.

Abstract: A liquid crystal display is provided, which includes: a first substrate; a first signal line formed on the first substrate; a second signal line formed on the first substrate and intersecting the first signal line; a pixel electrode including a plurality of partitions; a thin film transistor connected to the gate line, the data line, and the pixel electrode; a second substrate facing the second substrate; a common electrode formed on the second substrate and having an opening facing the first or the second signal line; and first and second domain defining members that define a plurality of domains in the liquid crystal display and are dispose on the first and the second substrates, respectively, the second domain defining member disposed on the second substrate and separated from the opening.

Abstract: A thin film transistor array panel is provided, which includes: a substrate; a plurality of first signal lines formed on the substrate; a plurality of second lines formed on the substrate, intersecting the first signal line, and including a plurality of curved portions having at least two curve points and a plurality of intermediate portions, the curved portions and the intermediate portions alternately connected; a plurality of pixel electrodes located substantially in areas defined by the first and the second signal lines; and a plurality of thin film transistors connected to the first and the second signal lines and the pixel electrodes.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.

Abstract: A method of manufacturing a liquid crystal display panel is provided, which includes: coating a negative organic photoresist on a substrate; performing divisional light exposure with a plurality of shots including first and second shots adjacent to each other; and developing the photoresist to form a light blocking member having a plurality of openings, wherein the first and the second shots have a boundary crossing the openings.

Abstract: A thin film transistor array panel is provided, which includes: a substrate; a plurality of first signal lines formed on the substrate; a plurality of second lines formed on the substrate, intersecting the first signal line, and including a plurality of curved portions having at least two curve points and a plurality of intermediate portions, the curved portions and the intermediate portions alternately connected; a plurality of pixel electrodes located substantially in areas defined by the first and the second signal lines; and a plurality of thin film transistors connected to the first and the second signal lines and the pixel electrodes.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.

Abstract: Provided is a multi-domain liquid crystal display device capable of improving a viewing angle by decreasing a color shift. The multi-domain LCD device includes a first substrate, a second substrate, a plurality of gate lines provided in one direction on the first substrate, a plurality of data lines provided substantially perpendicular to the plurality of gate lines to define a plurality of pixel regions including a first area and a second area, a common electrode and a pixel electrode which generate a parallel electric field within the first area to improve luminance, a common electrode and a pixel electrode which generate a parallel electric field within the second area to decrease color shift, and a liquid crystal layer formed between the first substrate and the second substrate.

Abstract: An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate.

Abstract: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT.