Abstract: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.

Abstract: A display apparatus includes a light emitting module to emit light; a first prism sheet provided on the light emitting module; a reflective polarizing sheet provided on the first prism sheet to transmit first polarized light of the light exiting the first prism sheet and reflect second polarized light of the light exiting the first prism sheet; a second prism sheet provided on the reflective polarizing sheet; and a liquid crystal panel provided on the second prism sheet, the liquid crystal panel including a liquid crystal cell, a first polarizing sheet provided on a first side the liquid crystal cell, and a second polarizing sheet provided between the second prism sheet and a second side of the liquid crystal cell, wherein the second prism sheet is configured to control a transmission angle at which the light exiting the reflective polarizing sheet is transmitted by the liquid crystal cell.

Abstract: A method of operating memory devices disposed in different ranks of a multi-rank memory device and sharing a signal line includes receiving, in all of the memory devices included in the multi-rank memory device, on-die termination (ODT) state information of the signal line. The method further includes storing, in each of the memory devices of the multi-rank memory device, the ODT state information of the signal line in a mode register. The method further includes generating, in each of the memory devices of the multi-rank memory device, a control signal based on the ODT state information of the signal line stored in the mode register. The method further includes changing, in each of the memory devices of the multi-rank memory device, an ODT setting of the signal line in response to the control signal.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: A processor-implemented classification method includes: determining a first probability vector including a first probability, for each of a plurality of classes, resulting from a classification of an input with respect to the classes; determining, based on the determined first probability vector, whether one or more of the classes represented in the first probability vector are confusing classes; adjusting, in response to one or more of the classes being the confusing classes, the determined first probability vector based on a first probability of each of the confusing classes and a maximum value of the first probabilities; determining a second probability vector including a second probability, for each of the classes, resulting from another classification of the input with respect to the classes; and performing classification on the input based on a result of a comparison between the determined second probability vector and the adjusted first probability vector.

Abstract: A cutting insert of the present invention comprises: an upper surface and a lower surface; first and second lateral surfaces; first and second cutting edge parts; and corner cutting edges, wherein the first cutting edge part includes: a first main cutting edge for forming one end at a portion spaced farthest away from the corner cutting edge; a first sub-cutting edge connected to the corner cutting edge; and a first auxiliary cutting edge for connecting the first main cutting edge and the first sub-cutting edge so as to form a step between the same, and the first sub-cutting edge and the corner cutting edge form one straight line when viewed toward the first lateral surface, and are inclined upward in the direction opposite to the direction toward the lower surface while gradually going in the direction toward the second cutting edge part.

Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, a buried conductive layer disposed adjacent to the active region on the substrate and extending in the first direction, a gate electrode intersecting the active region and extending in a second direction crossing the first direction, a source/drain layer disposed on the active region on one side of the gate electrode, a gate isolation pattern disposed on the buried conductive layer so as to be disposed adjacent to one end of the gate electrode, and extending in the first direction, and a contact plug disposed on the source/drain layer, electrically connected to the buried conductive layer, and in contact with the gate isolation pattern.

Abstract: A memory system includes a nonvolatile memory set including a nonvolatile memory; and a memory controller configured to control the nonvolatile memory set. The memory controller may write data to a memory block in a target memory block pool in the nonvolatile memory set during a target time period existing between a time at which an operation mode for the nonvolatile memory set is changed from a second operation mode to a first operation mode and a time at which a command including information indicating that a host expects a requested operation to be performed in the first operation mode is received from the host, prevent execution of a background operation for the nonvolatile memory set, when the operation mode is the first operation mode, and control a background operation for the nonvolatile memory set to be executable, when the operation mode is the second operation mode.

Abstract: A single poly multi time program (MTP) cell includes a second conductivity-type well, a sensing transistor comprising a drain, a sensing gate, and a source, a drain electrode connected to the drain, a source electrode connected to the source; a control gate connected to the sensing gate of the sensing transistor, and a control gate electrode, wherein the sensing transistor, the drain electrode, the source electrode, the control gate, and the control gate electrode are located on the second conductivity-type well.

Abstract: A semiconductor circuit and a semiconductor circuit layout system are provided. The semiconductor circuit includes a clock inverter which inverts a clock signal and outputs an inverted clock signal where the clock inverter is laid out between a second master latch main circuit configured to latch signals of a first node and a fourth node based on the clock signal and the inverted clock signal, respectively, and a second slave latch main circuit configured to latch signals of a second node and a fifth node based on the clock signal and the inverted clock signal, respectively.

Abstract: Provided are an image compressing method including determining a compressed image by performing downsampling using a deep neural network (DNN) on an image; determining a prediction signal by performing prediction based on the compressed image; determining a residual signal based on the compressed image and the prediction signal; and generating a bitstream comprising information about the residual signal, wherein the DNN has a network structure that is predetermined according to training of a downsampling process using information generated in an upsampling process, and an image compressing device for performing the image compressing method. Also, provided are an image reconstructing method of reconstructing a compressed image by using a DNN for upsampling, the compressed image having been compressed by the image compressing method, and an image reconstructing device for performing the image reconstructing method.

Abstract: Provided is a data transmission system using a carrier aggregation. The data transmission system may assign a radio resource based on a correspondence relationship between a downlink and an uplink, and may transmit data using the assigned radio resource.

Abstract: An antenna laminate according to an embodiment of the present invention includes a first dielectric layer and an antenna electrode layer disposed above a first ground layer, and a second dielectric layer and a second ground layer disposed below the first ground layer. The first ground layer and the second ground layer may form a ground composite to improve signal characteristics of the antenna.

Abstract: Disclosed are a method and an apparatus for transmitting and receiving a synchronization signal in a communication system. According to an exemplary embodiment of the present disclosure, a method of transmitting a first synchronization signal, performed by a base station in the communication system, may comprise generating a base sequence; generating a modified sequence by inverting polarity of the base sequence; mapping the base sequence and the modified sequence to a first frequency region having a frequency higher than a center subcarrier and a second frequency region having a frequency lower the center subcarrier, so that the base sequence and the modified sequence are symmetric centering the center subcarrier located at a center frequency of a frequency domain of the synchronization signal; and transmitting the synchronization signal comprising the base sequence and the modified sequence to a terminal. Therefore, performance of the communication system can be improved.

Abstract: Disclosed is a 5G or a pre-5G communication system to support a higher data transmission rate than a system after a 4G communication system such as LTE. A wireless communication method by a terminal according to one embodiment may include the operations of: identifying information indicating a type of each of multiple wireless networks, a strength of each of signals received from the multiple wireless networks, respectively, and power consumption of the terminal; selecting one wireless network among the multiple wireless networks on the basis of the information and the strength of each of current signals received from the multiple wireless networks, respectively; and communicating with the selected wireless network.

Abstract: An electronic device may include a semiconductor memory. The semiconductor memory may include: row lines; column lines intersecting the row lines; memory cells located in intersection regions of the row lines and the column lines, the memory cells including upper and lower electrodes; and interface layers located between the lower electrodes of the memory cells and the row lines, the interface layers having a width narrower than that of the row lines.

Abstract: A camera module includes a housing; a plurality of movable lens modules disposed in an internal space of the housing and configured to be movable in an optical axis direction, each of the plurality of movable lens modules comprising at least one lens; and a stopper configured to prevent contact between at least two of the plurality of movable lens modules, wherein the stopper includes a frame mounted on the housing; an extension portion extending from the frame into the internal space of the housing to face a side of one movable lens module of the plurality of movable lens modules in the optical axis direction; and a damping member disposed on the extension portion to face the side of the one movable lens module in the optical axis direction.

Abstract: According to the present invention, a device for controlling an operation of at least one electric device including a user interface unit having a conversation display window in which a conversation with the at least one electric device is displayed, a conversation input window configured to receive a character for controlling the operation of the at least one electric device, an icon selection window in which an icon corresponding to the at least one electric device is displayed, and a chatting screen on which a send button for transmitting the character received by the conversation input window is arranged, and a control unit configured to collectively control the operation of the at least one electric device based on a batch control instruction received by the conversation input window.

Abstract: A camera module includes a housing; a lens module provided in an internal space of the housing to be movable in an optical axis direction, and including at least one lens therein; a magnet disposed in the lens module; and position detection sensors to detect a position of the magnet. One or more of the position detection sensors are disposed to face a first polarity of the magnet and one or more of the position detection sensors are disposed to face a second polarity of the magnet different than the first polarity.

Abstract: A torque limit apparatus includes a user interface device that receives a speed setting value and a torque setting value of a motor from a user and outputs a state of the motor and a motor control device that controls a speed of the motor depending on speed set by the user and to interrupt an operation of the motor when torque of the motor reaches torque set by the user.