Patents by Inventor Young-Shying Chen
Young-Shying Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7877244Abstract: A simulating circuit for simulating a toggle magnetic tunneling junction (MTJ) element includes at least a synthetic Anti-Ferromagnetic free layer, a tunnel barrier layer, and a synthetic Anti-Ferromagnetic pinned layer. The simulating circuit is configured with a converting circuit, a status circuit, a storage circuit, a voltage computing circuit and a feature simulating circuit. The convert circuit converts the magnetic filed generated from a write in current to an equivalent voltage. The status circuit indicates the flipping status of the magnetic moment of the free layer. The storage circuit is used for representing data stored in the toggle magnetic tunneling junction element. The arrangement of the magnetic moment of the two Anti-Ferromagnetic adjacent to the tunnel barrier layer is represented by the voltage computing circuit. The voltage-current characteristic is represented by the feature simulating circuit.Type: GrantFiled: February 28, 2008Date of Patent: January 25, 2011Assignee: Industrial Technology Research InstituteInventor: Young-Shying Chen
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Patent number: 7683447Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of memory cells includes: forming a fixed magnetic layer having magnetic moments fixed in a predetermined direction; forming a tunnel layer over the fixed magnetic layer; forming a free magnetic layer, having magnetic moments aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer; forming a hard mask on the free magnetic layer partially covering the free magnetic layer; and unmagnetizing portions of the free magnetic layer uncovered by the hard mask for defining one or more magnetic tunnel junction (MTJ) units.Type: GrantFiled: September 12, 2007Date of Patent: March 23, 2010Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Jen Wang, Young-Shying Chen, Ya-Chen Kao, Chun-Jung Lin
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Patent number: 7646635Abstract: A data reading circuit of a magnetic memory applicable for reading data of a magnetic memory includes a first transistor, a second transistor connected to the first transistor in series, a third transistor, a fourth transistor connected to the third transistor in series, a first transmission gate electrically connected to the first transistor, a second transmission gate electrically connected to the first and third transistors, a comparison circuit having two input ends respectively connected to the first transistor, and a storage capacitor having an end electrically connected to the first transistor and the other end connected to a power end.Type: GrantFiled: December 28, 2007Date of Patent: January 12, 2010Assignee: Industrial Technology Research InstituteInventors: Young-Shying Chen, Ding-Yeong Wang
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Publication number: 20090303779Abstract: An integrated circuit structure includes a first fixed magnetic element; a second fixed magnetic element; and a composite free magnetic element between the first and the second fixed magnetic elements. The composite free magnetic element includes a first free layer and a second free layer.Type: ApplicationFiled: June 5, 2008Publication date: December 10, 2009Inventors: Young-Shying Chen, Yung-Hung Wang, Yu-Jen Wang, Chun-Jung Lin
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Patent number: 7554836Abstract: A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.Type: GrantFiled: December 28, 2007Date of Patent: June 30, 2009Assignee: Industrial Technology Research InstituteInventors: Young-Shying Chen, Chung-Chih Wang, Chia-Pao Chang, Chien-Chung Hung
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Publication number: 20090065883Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of memory cells includes: forming a fixed magnetic layer having magnetic moments fixed in a predetermined direction; forming a tunnel layer over the fixed magnetic layer; forming a free magnetic layer, having magnetic moments aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer; forming a hard mask on the free magnetic layer partially covering the free magnetic layer; and unmagnetizing portions of the free magnetic layer uncovered by the hard mask for defining one or more magnetic tunnel junction (MTJ) units.Type: ApplicationFiled: September 12, 2007Publication date: March 12, 2009Inventors: Yu-Jen Wang, Young-Shying Chen, Ya-Chen Kao, Chun-Jung Lin
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Publication number: 20090010088Abstract: A data reading circuit of a magnetic memory applicable for reading data of a magnetic memory includes a first transistor, a second transistor connected to the first transistor in series, a third transistor, a fourth transistor connected to the third transistor in series, a first transmission gate electrically connected to the first transistor, a second transmission gate electrically connected to the first and third transistors, a comparison circuit having two input ends respectively connected to the first transistor, and a storage capacitor having an end electrically connected to the first transistor and the other end connected to a power end.Type: ApplicationFiled: December 28, 2007Publication date: January 8, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Young-Shying CHEN, Ding-Yeong WANG
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Publication number: 20090010087Abstract: A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.Type: ApplicationFiled: December 28, 2007Publication date: January 8, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Young-Shying CHEN, Chung-Chih WANG, Chia-Pao CHANG, Chien-Chung HUNG
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Publication number: 20090006050Abstract: A simulating circuit for simulating a toggle magnetic tunneling junction (MTJ) element includes at least a synthetic Anti-Ferromagnetic free layer, a tunnel barrier layer, and a synthetic Anti-Ferromagnetic pinned layer. The simulating circuit is configured with a converting circuit, a status circuit, a storage circuit, a voltage computing circuit and a feature simulating circuit. The convert circuit converts the magnetic filed generated from a write in current to an equivalent voltage. The status circuit indicates the flipping status of the magnetic moment of the free layer. The storage circuit is used for representing data stored in the toggle magnetic tunneling junction element. The arrangement of the magnetic moment of the two Anti-Ferromagnetic adjacent to the tunnel barrier layer is represented by the voltage computing circuit. The voltage-current characteristic is represented by the feature simulating circuit.Type: ApplicationFiled: February 28, 2008Publication date: January 1, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Young-Shying CHEN
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Publication number: 20080239800Abstract: A magnetic memory array. A first bit line provides a first writing magnetic field to a magnetic memory cell. A second bit line provides a second writing magnetic field to a reference magnetic memory cell. A word line provides a third writing magnetic field to the magnetic memory cell and a fourth writing magnetic field to the reference magnetic memory cell. The third writing magnetic field exceeds the fourth writing magnetic field.Type: ApplicationFiled: June 6, 2008Publication date: October 2, 2008Inventors: Chi-Ming Chen, Chien-Chung Hung, Young-Shying Chen, Lien-Chang Wang
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Patent number: 7397694Abstract: A magnetic memory array. A first bit line provides a first writing magnetic field to a magnetic memory cell. A second bit line provides a second writing magnetic field to a reference magnetic memory cell. A word line provides a third writing magnetic field to the magnetic memory cell and a fourth writing magnetic field to the reference magnetic memory cell. The third writing magnetic field exceeds the fourth writing magnetic field.Type: GrantFiled: January 26, 2006Date of Patent: July 8, 2008Assignee: Industrial Technology Research InstituteInventors: Chi-Ming Chen, Chien-Chung Hung, Young-Shying Chen, Lien-Chang Wang
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Publication number: 20080003701Abstract: A non-via method of connecting a magnetoelectric element with a conductive line is provided. A magnetoelectric element is formed on a substrate. Spacers are formed on side walls of the magnetoelectric element. A first dielectric layer is deposited over the substrate and the magnetoelectric element. The first dielectric layer is planarized to a level above the magnetoelectric element. A second dielectric layer is deposited over the first dielectric layer. The first and second dielectric layers are etched to form a trench, exposing an upper surface of the magnetoelectric element. A conductive material layer is filled into the trench to form a conductive line on the magnetoelectric element.Type: ApplicationFiled: July 20, 2007Publication date: January 3, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Young-Shying Chen, Wei-Chuan Chen, Ming-Jer Kao
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Publication number: 20070171703Abstract: A current source for magnetic random access memory (MRAM) is provided, including a band-gap reference circuit, a first stage buffer, and a plurality of second stage buffers. The band-gap reference circuit provides an output reference voltage which is locked by the first stage buffer. The plurality of second stage buffers generate a stable voltage in response to the locked voltage, so as to provide a current for the conducting wire after being converted, such that magnetic memory cell changes its memory state in response to the current. The current source may reduce the discharge time under the operation of biphase current, so as to raise the operating speed. Further, the circuit area of the current source for the MRAM is also reduced. The operation of multiple write wires may be provided simultaneously to achieve parallel write.Type: ApplicationFiled: November 9, 2006Publication date: July 26, 2007Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Rei-Fu Huang, Young-Shying Chen, Chien-Chung Hung, Yuan-Jen Lee, Ming-Jer Kao
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Publication number: 20070030723Abstract: A magnetic memory array. A first bit line provides a first writing magnetic field to a magnetic memory cell. A second bit line provides a second writing magnetic field to a reference magnetic memory cell. A word line provides a third writing magnetic field to the magnetic memory cell and a fourth writing magnetic field to the reference magnetic memory cell. The third writing magnetic field exceeds the fourth writing magnetic field.Type: ApplicationFiled: January 26, 2006Publication date: February 8, 2007Inventors: Chi-Ming Chen, Chien-Chung Hung, Young-Shying Chen, Lien-Chang Wang
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Publication number: 20060148234Abstract: A non-via method of connecting a magnetoelectric element with a conductive line. A magnetoelectric element is formed on a substrate, and spacers are formed on side walls of the magnetoelectric element. A dielectric layer is deposited over the substrate and magnetoelectric element and planarized to a level above the magnetoelectric element. The dielectric layer is etched to expose the upper surface of the magnetoelectric element, and a conductive line is formed on the magnetoelectric element.Type: ApplicationFiled: June 17, 2005Publication date: July 6, 2006Inventors: Young-shying Chen, Hong-Hui Hsu, Wei-Chuan Chen, Chun-Fei Chuang, Ming-Jer Kao
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Publication number: 20060039189Abstract: A magnetic random access memory with tape read line, fabricating method and circuit thereof is provided. The memory is composed of a top write line, a bottom write line which is vertical to the top write line, a MTJ formed on the bottom write line, a spacer formed around the MTJ, and a tape read line formed on the MTJ. The fabricating steps involves forming a bottom write line, forming a MTJ on the bottom write, and forming a tape read line on the MTJ sequentially. In the circuit, the tape read line is either parallel to or vertical to the top write line.Type: ApplicationFiled: January 12, 2005Publication date: February 23, 2006Inventors: Young-Shying Chen, Ming-Jer Kao, Lien-Chang Wang, Chien-Chung Hung, Chi-Ming Chen