Patents by Inventor Young-so Park

Young-so Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145263
    Abstract: According to an aspect of the present disclosure, there is provided a substrate treating apparatus comprising: a vessel part having a substrate treatment region formed therein and including a supply port through which a treating fluid is supplied to the substrate treatment region and an exhaust port through which the treating fluid is exhausted from the substrate treatment region; a fluid supply unit configured to supply the treating fluid to the substrate treatment region; an exhaust unit configured to exhaust the treating fluid from the vessel part. The exhaust unit comprises: a main line connected to the exhaust port; an extension line branched from at least one of first and second nodes of the main line and including at least one of a first orifice or a first check valve to control an exhaust speed; and an auxiliary line branched from a third node of the main line, where an orifice and a check valve are not formed.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 2, 2024
    Inventors: Seung Hoon OH, Ki Bong KIM, Jong Doo LEE, Young Hun LEE, Mi So PARK, Jin Se PARK, Yong Sun KO
  • Patent number: 6104050
    Abstract: An integrated circuit device includes a substrate, an insulating layer on the substrate, and a plurality of parallel conductive lines on the insulating layer. An etch barrier is on each of the parallel conductive lines wherein each of the etch barriers comprises a layer of silicon nitride on a respective conductive line and wherein each of the etch barriers further comprises a layer of silicon on the silicon nitride layer. In addition, the device includes a plurality of conductive vias through the insulating layer providing electrical connection to respective surface portions of the substrate, wherein each of the conductive vias is provided in the insulating layer between the etch barriers.
    Type: Grant
    Filed: January 5, 1998
    Date of Patent: August 15, 2000
    Assignee: Samsung Electronics Co., LTD
    Inventors: Do-hyung Kim, Joo-young Lee, Young-so Park
  • Patent number: 5763323
    Abstract: A method for fabricating an integrated circuit device includes the steps of forming an insulating layer on a substrate and forming a plurality of parallel conductive lines on the insulating layer. An etch barrier is formed on each of the parallel conductive lines, and contact holes are formed between the etch barriers. The contact holes expose portions of the substrate without exposing the plurality of parallel conductive lines. In particular, the contact holes can be formed by forming a patterned mask layer on the insulating layer and etch barriers, and etching exposed portions of the insulating layer. The patterned mask layer selectively exposes a plurality of parallel strips orthogonal to the plurality of parallel conductive lines. Related structures are also discussed.
    Type: Grant
    Filed: August 7, 1996
    Date of Patent: June 9, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-hyung Kim, Joo-young Lee, Young-so Park