Abstract: According to an embodiment, both the high-speed communication and the low-speed communication are performed using a single communication line, thereby reducing limitations on wiring on a PCB and increasing the utilization efficiency of a transmission line.

Abstract: According to an embodiment, both the high-speed communication and the low-speed communication are performed using a single communication line, thereby reducing limitations on wiring on a PCB and increasing the utilization efficiency of a transmission line.

Abstract: According to an embodiment, both the high-speed communication and the low-speed communication are performed using a single communication line, thereby reducing limitations on wiring on a PCB and increasing the utilization efficiency of a transmission line.

Abstract: According to an embodiment, both the high-speed communication and the low-speed communication are performed using a single communication line, thereby reducing limitations on wiring on a PCB and increasing the utilization efficiency of a transmission line.

Abstract: The present invention relates to a false lock prevention circuit and method which is used to cause a delayed locked loop (DLL) to escape from false lock such as harmonic lock or stuck lock, when the false lock occurred in the DLL, and a DLL using the same. The false lock prevention circuit includes a harmonic lock detector configured to detect harmonic lock and a stuck lock detector configured to detect stuck lock. The harmonic lock detector includes a plurality of flip-flops configured to sample a plurality of delayed clocks and a logic unit. The harmonic lock detector compares a reference clock signal with the plurality of delayed clock signals, and detects whether or not the positive edges deviate from one cycle of the reference clock signal.

Abstract: The present invention relates to a false lock prevention circuit and method which is used to cause a delayed locked loop (DLL) to escape from false lock such as harmonic lock or stuck lock, when the false lock occurred in the DLL, and a DLL using the same. The false lock prevention circuit includes a harmonic lock detector configured to detect harmonic lock and a stuck lock detector configured to detect stuck lock. The harmonic lock detector includes a plurality of flip-flops configured to sample a plurality of delayed clocks and a logic unit. The harmonic lock detector compares a reference clock signal with the plurality of delayed clock signals, and detects whether or not the positive edges deviate from one cycle of the reference clock signal.

Abstract: Differential current driving type transmitter and receiver, and an interface system having the transmitter and receiver. The transmitter includes a current source, a current direction selecting block, and a balancing switch block. The current source sources currents to a pair of transmission lines or sinks currents flowing through the pair of transmission lines. The current direction selecting block transfers a current flowing from the current source to one transmission line of the pair of transmission lines and a current flowing through the other transmission line of the pair of transmission lines to the current source. The balancing switch block initializes the pair of transmission lines to a balanced state.

Abstract: A method for seeking a target position on a multi-layer disc is provided. When a target position seek operation requires a layer jump in an optical disc, a required horizontal movement direction for the optical pick-up is determined. If the optical pickup must move horizontally from the outer circumference to the inner circumference of the disc, the horizontal movement operation is performed first at the current layer, and then a layer jump operation is performed. Because the layer jump operation is performed at the inner circumference of the optical disc, where the optical pickup will not likely encounter a data area which includes location information, a target position seek operation which requires a jump between multiple layers of the disc can be precisely and rapidly performed.