Patents by Inventor Young-Su Oh

Young-Su Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11742015
    Abstract: A memory system is provided to include a storage device including memory cells for storing data, and a controller in communication with an external device and configured to control the storage device based on a request from the external device. The controller is configured to receive a request from the external device to perform a refresh operation of re-writing stored data in the memory cells, read data from the memory cells included in the storage device, set a refresh period based on a number of fail bits included in the read data and a temperature of the controller or the storage device, and perform the refresh operation of the storage device based on the refresh period.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: August 29, 2023
    Assignee: SK hynix Inc.
    Inventors: Hyun Ju Yoon, Min Kang, Dong Uc Ko, Dong Keun Kim, Young Su Oh, Jun Hyun Chun
  • Publication number: 20230253026
    Abstract: A semiconductor apparatus includes a temperature detecting circuit and a temperature raising circuit. The temperature detecting circuit detects a temperature to generate temperature detection information. The temperature raising circuit generates heat through a toggling operation based on the temperature detection information.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 10, 2023
    Applicant: SK hynix Inc.
    Inventors: Dong Keun KIM, Min KANG, Dong Uc KO, Young Su OH, Hyun Ju YOON, Jun Hyun CHUN
  • Patent number: 11587608
    Abstract: There are provided a volatile memory device, and an operating method. The volatile memory device includes: a plurality of memory cells arranged in rows and columns and structured to store data; word lines; bit lines; a row decoder; a column decoder; and a control logic coupled to communicate with the row and column decoders and configured to, in an active period, provide the row decoder with a first command, and provide the column decoder with a second command, wherein the row decoder is further configured to: apply a first word line voltage higher than a ground voltage to a selected word line, from when the first command is provided; and for a duration over which the row decoder is activated, apply either a second word line voltage lower than the first word line voltage to the selected word line or no voltage to the selected word line.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: February 21, 2023
    Assignee: SK hynix Inc.
    Inventors: Hyun Ju Yoon, Min Kang, Dong Uc Ko, Dong Keun Kim, Young Su Oh, Jun Hyun Chun
  • Publication number: 20230011582
    Abstract: A memory module includes a module substrate, a plurality of memory devices, a first power line, and a second power line. The memory devices are mounted on the module substrate. Each of the memory devices includes a power management member. The first power line may be arranged in the module substrate to provide each of the memory devices with power. The second power line may be electrically connected between the power management members of adjacent memory devices to control and share the power provided to the adjacent memory devices.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 12, 2023
    Applicant: SK hynix Inc.
    Inventors: Dong Keun KIM, Min KANG, Dong Uc KO, Young Su OH, Hyun Ju YOON, Jun Hyun CHUN
  • Publication number: 20220270673
    Abstract: A semiconductor apparatus includes a temperature detecting circuit and a temperature raising circuit. The temperature detecting circuit detects a temperature to generate temperature detection information. The temperature raising circuit generates heat through a toggling operation based on the temperature detection information.
    Type: Application
    Filed: July 1, 2021
    Publication date: August 25, 2022
    Applicant: SK hynix Inc.
    Inventors: Dong Keun KIM, Min KANG, Dong Uc KO, Young Su OH, Hyun Ju YOON, Jun Hyun CHUN
  • Publication number: 20220165325
    Abstract: There are provided a volatile memory device, and an operating method. The volatile memory device includes: a plurality of memory cells arranged in rows and columns and structured to store data; word lines; bit lines; a row decoder; a column decoder; and a control logic coupled to communicate with the row and column decoders and configured to, in an active period, provide the row decoder with a first command, and provide the column decoder with a second command, wherein the row decoder is further configured to: apply a first word line voltage higher than a ground voltage to a selected word line, from when the first command is provided; and for a duration over which the row decoder is activated, apply either a second word line voltage lower than the first word line voltage to the selected word line or no voltage to the selected word line.
    Type: Application
    Filed: June 2, 2021
    Publication date: May 26, 2022
    Inventors: Hyun Ju YOON, Min KANG, Dong Uc KO, Dong Keun KIM, Young Su OH, Jun Hyun CHUN
  • Publication number: 20220165329
    Abstract: A memory system is provided to include a storage device including memory cells for storing data, and a controller in communication with an external device and configured to control the storage device based on a request from the external device. The controller is configured to receive a request from the external device to perform a refresh operation of re-writing stored data in the memory cells, read data from the memory cells included in the storage device, set a refresh period based on a number of fail bits included in the read data and a temperature of the controller or the storage device, and perform the refresh operation of the storage device based on the refresh period.
    Type: Application
    Filed: June 7, 2021
    Publication date: May 26, 2022
    Inventors: Hyun Ju YOON, Min KANG, Dong Uc KO, Dong Keun KIM, Young Su OH, Jun Hyun CHUN
  • Publication number: 20030003760
    Abstract: A method of coating a wafer with photoresist includes steps of injecting solvent on a wafer, subsequently applying photoresist onto the wafer, rotating the wafer at a constant speed, and directing a laminar flow of air towards the wafer as it is rotating. Since the solvent is injected onto the wafer prior to the photoresist, the surface tension and viscosity of the photoresist are lowered. The laminar airflow suppresses turbulence at the surface of the wafer, which turbulence is otherwise created by the act of rotating the wafer. To this end, a cylinder is raised to form a chamber over the wafer, and filtered air is blown into the cylindrical chamber. These measures make it is possible for the photoresist film to be formed with a uniform thickness.
    Type: Application
    Filed: May 31, 2002
    Publication date: January 2, 2003
    Inventors: Sung-Il Kim, Sung-Hyun Park, Jae-Kwan Song, Dong-Ho Cha, Yoon-Keun Lee, Young-Ho Park, Kyung-Suk An, Young-Su Oh