Patents by Inventor Young Taek Song

Young Taek Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7645670
    Abstract: A method for fabricating a nonvolatile memory device includes forming a tunneling insulation layer, a first conductive layer for forming a floating gate, and a hard mask over a substrate. A portion of the hard mask, the first conductive layer, the tunneling insulation layer, and the substrate is etched to form a trench. An isolation structure is formed to fill in the trench. The etched hard mask is removed such that an upper portion of the isolation structure protrudes above the etched first conductive layer. A dielectric layer is formed over the etched first conductive layer. A second conductive layer for forming a control gate is formed over the isolation structure and the dielectric layer. The second conductive layer is polished to align an upper surface of the second conductive layer using an upper surface of the isolation structure.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: January 12, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Young-Taek Song
  • Publication number: 20080138951
    Abstract: A method for fabricating a nonvolatile memory device includes forming a tunneling insulation layer, a first conductive layer for forming a floating gate, and a hard mask over a substrate. A portion of the hard mask, the first conductive layer, the tunneling insulation layer, and the substrate is etched to form a trench. An isolation structure is formed to fill in the trench. The etched hard mask is removed such that an upper portion of the isolation structure protrudes above the etched first conductive layer. A dielectric layer is formed over the etched first conductive layer. A second conductive layer for forming a control gate is formed over the isolation structure and the dielectric layer. The second conductive layer is polished to align an upper surface of the second conductive layer using an upper surface of the isolation structure.
    Type: Application
    Filed: September 24, 2007
    Publication date: June 12, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventor: Young-Taek SONG
  • Publication number: 20070087569
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of gate patterns over a substrate, each gate pattern comprising a hard mask and a gate electrode, forming a photoresist layer over the gate patterns, performing a planarizing process until the hard masks of the gate patterns are exposed using slurry, and removing the photoresist layer. The hard mask includes an oxide-based material.
    Type: Application
    Filed: June 29, 2006
    Publication date: April 19, 2007
    Inventors: Young-Taek Song, Sang-Wook Park
  • Patent number: 6927168
    Abstract: A method of manufacturing a semiconductor device capable of polishing evenly and separating the adjacent word lines by performing the flattening process using slurry with a doping material added during the polishing process.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: August 9, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventor: Young Taek Song
  • Publication number: 20040266166
    Abstract: The present invention is provided to manufacture a semiconductor device capable of polishing evenly and separating the adjacent word lines by performing the flattening process using slurry with a doping material added during the polishing process.
    Type: Application
    Filed: December 4, 2003
    Publication date: December 30, 2004
    Inventor: Young Taek Song
  • Patent number: D471187
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 4, 2003
    Inventor: Young Taek Song