Abstract: A key scheduler for an encryption apparatus using a DES encryption algorithm is disclosed.

Abstract: An encryption apparatus using a DES encryption algorithm is disclosed. The apparatus for encrypting 64-bit plain text blocks includes: input buffering unit for receiving a plain text block byte-by-byte and outputting a first and a second 32-bit plain text blocks in response to a first clock; encryption unit for performing time multiplexed encryption of the first and the second 32-bit plain text blocks in response to the first clock and a second clock, thereby generating a first and a second 32-bit cipher text blocks; and output buffering unit for receiving the first and the second 32-bit cipher text blocks in response to the second clock and outputting eight 8-bit cipher text blocks.

Abstract: An encryption device of the present invention eliminates data contention and minimizes area by using a faster memory that can access data multiple times within a given time.

Abstract: An encryption device eliminates data contention and minimizes area by accessing twice data for a given time by using a memory device of two times faster access time. The encryption device for performing encryption of plain text blocks using data encryption standard algorithm, wherein the encryption device includes an initial permutation unit, a data encryption unit having n-stage (n is an even number) pipeline structure using a first clock, a second clock and a third clock, and an inverse initial permutation unit, the encryption device includes: a multiplexer for selecting one of n/3 48-bit inputs; 8 S-Boxes, each for receiving 6-bit address among the selected 48-bit and outputting 4-bit data; a demultiplexer for distributing 32-bit data from the S-Boxes to n/3 outputs; and a controller for control the multiplexer and the demultiplexer with a fourth clock and a fifth clock, wherein the fourth and the fifth clock are faster than the first, the second and the third clocks by n/3 times.

Abstract: A key scheduler for an encryption apparatus using a DES encryption algorithm is disclosed.

Abstract: An encryption apparatus using a DES encryption algorithm is disclosed. The apparatus for encrypting 64-bit plain text blocks includes: input buffering unit for receiving a plain text block byte-by-byte and outputting a first and a second 32-bit plain text blocks in response to a first clock; encryption unit for performing time multiplexed encryption of the first and the second 32-bit plain text blocks in response to the first clock and a second clock, thereby generating a first and a second 32-bit cipher text blocks; and output buffering unit for receiving the first and the second 32-bit cipher text blocks in response to the second clock and outputting eight 8-bit cipher text blocks.

Abstract: An encryption device of the present invention eliminates data contention and minimizes area by using a faster memory that can access data multiple times within a given time.

Abstract: An encryption device eliminates data contention and minimizes area by accessing twice data for a given time by using a memory device of two times faster access time. The encryption device for performing encryption of plain text blocks using data encryption standard algorithm, wherein the encryption device includes an initial permutation unit, a data encryption unit having n-stage (n is an even number) pipeline structure using a first clock, a second clock and a third clock, and an inverse initial permutation unit, the encryption device includes: a multiplexer for selecting one of n/3 48-bit inputs; 8 S-Boxes, each for receiving 6-bit address among the selected 48-bit and outputting 4-bit data; a demultiplexer for distributing 32-bit data from the S-Boxes to n/3 outputs; and a controller for control the multiplexer and the demultiplexer with a fourth clock and a fifth clock, wherein the fourth and the fifth clock are faster than the first, the second and the third clocks by n/3 times.