Abstract: The method of the present invention enables efficient detection of a plurality of target nucleic acid sequences in one detection channel, by obtaining a data set of cycle/signal-change value.

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: The present invention relates to a method and device for determining the presence or absence of a target analyte in a sample. The present invention may analyze the target analyte without false results, especially false positive results by using a fitting accuracy of a nonlinear function to a data set as a direct indicator for target analyte analysis.

Abstract: A multilayer capacitor includes a capacitor body having a first surface and a second surface opposing each other, and a third surface and a fourth surface opposing each other while being connected to the first surface and the second surface. The multilayer capacitor includes dielectric layers, and a first internal electrode and a second internal electrode disposed alternately with the dielectric layers interposed therebetween and being exposed to the first and second surfaces, respectively; and an amorphous dielectric film disposed on at least the third and fourth surfaces of the capacitor body. The amorphous dielectric film may be in direct contact with the first and second internal electrodes.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A multilayer ceramic capacitor includes a body including first and second internal electrodes facing each other with respective dielectric layers interposed therebetween, and first and second external electrodes disposed on an external surface of the body and electrically connected to the first and second internal electrodes, respectively. Each of the first and second external electrodes includes a first electrode layer containing any one selected from the group consisting of TiW, TiN, and TaN, or a combination thereof, and a second electrode layer disposed on the first electrode layer.

Abstract: The present invention relates to novel modules for transferring magnetic beads, an automated system comprising the same and a method for extracting nucleic acids using the same. The specifically designed magnet module and cover module of the present invention can be employed in the automated liquid handling apparatus by means of pre-existing moving modules (e.g., pipettor module) of the apparatus. The present invention enables a bead transfer-type method for extracting nucleic acids to be performed in an automated manner on the automated liquid handling apparatus. The present invention provides advantages of higher level of automation, more reduced cost and no need for another separate liquid handling apparatus compared to the conventional bead transfer-type method usually performed in the small apparatus designed to be used only for this bead transfer-type method. Also, the present method has the merits of more shortened reaction time compared to the conventional liquid transfer-type method.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: An organic light-emitting diode (OLED) display device includes a substrate; a light-emitting diode including a first electrode, an organic emitting layer and a second electrode and disposed on a first side of the substrate; and a foamed polymer layer disposed on a second side of the substrate and including a polymer resin and an air pocket inside the polymer resin.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: Provided are a seal tape and a secondary battery. The seal tape for adhering an electrode assembly includes a pressure-sensitive adhesive layer including a cured product of a pressure-sensitive adhesive composition including a polymer including a polar functional group-containing monomer as a polymerization unit, and is expanded in contact with an electrolyte solution to be detached from the electrode assembly, and therefore, isotropic volume expansion and contraction of the electrode assembly may be induced by repeated charging and discharging of a secondary battery and a disconnection phenomenon in which an electrode is disconnected may be prevented.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: Disclosed is an organic light-emitting display device having a micro lens array (MLA) structure applied to a display panel in order to improve light extraction efficiency. In the organic light-emitting display device, an optical device, including a reactive mesogen (RM) and a dye, is provided between a polarizer and a quarter wave plate (QWP) to block light spreading to a viewing angle, thereby reducing a diffuse reflection component due to the application of the MLA structure.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

Abstract: An organic light-emitting diode (OLED) display device includes a substrate; a light-emitting diode including a first electrode, an organic emitting layer and a second electrode and disposed on a first side of the substrate; and a foamed polymer layer disposed on a second side of the substrate and including a polymer resin and an air pocket inside the polymer resin.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.