Abstract: An emitter, a field emission assembly, and an electromagnetic wave generator are provided, and the emitter is an emitter for emitting electrons in an electromagnetic wave generator and is in the form of a sheet in which a plurality of yarns including carbon nanotube (CNT) fibers are weaved.

Abstract: A field emission assembly and an electromagnetic wave generator are provided, the field emission assembly includes a linear emitter which includes carbon nanotube (CNT) fibers and emits electrons and a holder configured to fix the emitter, both ends of the emitter are fixed to the holder, and the emitter includes at least one of a curved portion so as to form a peak in an electron emission direction and a bent portion so as to form a peak in the electron emission direction.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: An apparatus for automatically inspecting the welding state of a battery module is configured to inspect welding states of welding parts of a plurality of leads for electrical connection based on a deep penetration inspection using application of eddy current to the welding parts of the leads.

Abstract: A novel quinazoline compound having SOS1 inhibitory activity and uses of the quinazoline compound are disclosed. More particularly, the present invention relates to a novel quinazoline derivative compound having inhibitory activity on SOS1 binding to RAS family proteins and/or RAC1, to pharmacologically acceptable salts thereof, and to pharmaceutical compositions containing the quinazoline compound. The novel quinazoline compound has the following chemical formula 1: wherein all the variables have meaning as defined in the specification.

Abstract: A test board unit may include a test board, a thermal tank and a heat-dissipating plate. The test board may be configured to provide a semiconductor chip with a test current. The thermal tank may be configured to dissipate heat generated in the semiconductor chip. The heat-dissipating plate may be coupled between the test board and the thermal tank and may be configured to transfer the heat from the semiconductor chip to the thermal tank.

Abstract: A mobile terminal including a wireless communication unit configured to provide wireless communication; a touch screen; and a controller configured to receive a sliding input having a sliding trajectory on the touch screen, slidably display a notification bar along the sliding trajectory, display a given number of notification messages in a specific area of the notification bar, receive a drag input in the specific area, and display updated notification messages in the specific area with other notification messages.

Abstract: Provided are a magnetic sensor test apparatus and a magnetic sensor test method. The magnetic sensor test apparatus includes a vertical coil and at least one periphery coil disposed peripherally about the vertical coil. Both the vertical coil and the periphery coil may be configured to generate a horizontal and/or a vertical magnetic field in a semiconductor wafer.

Abstract: A test board unit may include a test board, a thermal tank and a heat-dissipating plate. The test board may be configured to provide a semiconductor chip with a test current. The thermal tank may be configured to dissipate heat generated in the semiconductor chip. The heat-dissipating plate may be coupled between the test board and the thermal tank and may be configured to transfer the heat from the semiconductor chip to the thermal tank.

Abstract: A mobile terminal including a wireless communication unit configured to provide wireless communication; a touch screen; and a controller configured to receive a sliding input having a sliding trajectory on the touch screen, slidably display a notification bar along the sliding trajectory, display a given number of notification messages in a specific area of the notification bar, receive a drag input in the specific area, and display updated notification messages in the specific area with other notification messages.

Abstract: Provided are a magnetic sensor test apparatus and a magnetic sensor test method. The magnetic sensor test apparatus includes a vertical coil configured to generate a magnetic field and at least one periphery coil. The magnetic sensor test apparatus and method may test a magnetic sensor on a semiconductor wafer.

Abstract: The present invention discloses a circuit for generating a data strobe signal in a DDR memory device and a method therefor which can precisely distinguish preamble and postamble periods of the data strobe signal by generating pulses for generating the data strobe signal only in a data strobe signal input period by using an internal clock signal according to CAS latency under a read command, and generating the data strobe signal by using the pulses, and which can improve reliability of the circuit operation by precisely controlling operation timing with the internal clock signal.

Abstract: The present invention discloses a circuit for generating a data strobe signal in a DDR memory device and a method therefor which can precisely distinguish preamble and postamble periods of the data strobe signal by generating pulses for generating the data strobe signal only in a data strobe signal input period by using an internal clock signal according to CAS latency under a read command, and generating the data strobe signal by using the pulses, and which can improve reliability of the circuit operation by precisely controlling operation timing with the internal clock signal.

Abstract: The present invention discloses a circuit for generating a data strobe signal in a DDR memory device and a method therefor which can precisely distinguish preamble and postamble periods of the data strobe signal by generating pulses for generating the data strobe signal only in a data strobe signal input period by using an internal clock signal according to CAS latency under a read command, and generating the data strobe signal by using the pulses, and which can improve reliability of the circuit operation by precisely controlling operation timing with the internal clock signal.

Abstract: Showerheads including a plate having a plurality of gas outlet holes extending therethrough and a head cover coupled to the plate to form a space between the plate and the head cover. A gas supply inlet member is configured to provide gas to the space directed toward the head cover. A gas distribution member on an inner face of the head cover facing the space is configured to partially suppress flow of the gas provided to the space in a direction along the gas distribution member to substantially uniformly distribute the gas in the space. The direction along the gas distribution member may be a horizontal direction and the gas provided to the space is directed in a substantially vertical upward direction. Apparatus and methods using the showerheads are also provided.

Abstract: A memory device having a duty ratio corrector which can reduce power consumption by blocking current paths between output terminals and a ground terminal by applying input signals for turning off switching devices for generating an auxiliary voltage for correcting a duty ratio at an initial stage, and which can improve an operational speed by changing the auxiliary voltage from a predetermined voltage, not 0V, to a target voltage.

Abstract: A memory device having a duty ratio corrector which can reduce power consumption by blocking current paths between output terminals and a ground terminal by applying input signals for turning off switching devices for generating an auxiliary voltage for correcting a duty ratio at an initial stage, and which can improve an operational speed by changing the auxiliary voltage from a predetermined voltage, not 0V, to a target voltage.

Abstract: The present invention discloses a circuit for generating a data strobe signal in a DDR memory device and a method therefor which can precisely distinguish preamble and postamble periods of the data strobe signal by generating pulses for generating the data strobe signal only in a data strobe signal input period by using an internal clock signal according to CAS latency under a read command, and generating the data strobe signal by using the pulses, and which can improve reliability of the circuit operation by precisely controlling operation timing with the internal clock signal.

Abstract: Provided is directed to an on-die termination control circuit and a method for generating an on-die termination control signal, and the circuit and the method are capable of performing an optimized termination operation during data input and output, by generating a control signal during read and write operations and then controlling the termination circuit to differentiate an impedance of the termination circuit.

Abstract: The present invention discloses a duty ratio corrector which can reduce power consumption by blocking current paths between output terminals and a ground terminal by applying input signals for turning off switching devices for generating an auxiliary voltage for correcting a duty ratio at an initial stage, and which can improve an operational speed by changing the auxiliary voltage from a predetermined voltage, not 0V, to an target voltage, and a memory device having the same.