Patents by Inventor Youngbog YOON

Youngbog YOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR GENERATING A LAYOUT OF AN INTEGRATED CIRCUIT
    Publication number: 20230004703
    Abstract: Generating a layout of an integrated circuit having a plurality of components may be performed by generating placement information of the plurality of components; generating pin position information for pins of the plurality of components; generating grid information according to the pin position information; and generating routing information between two pins of the plurality of components using the grid information.
    Type: Application
    Filed: June 2, 2022
    Publication date: January 5, 2023
    Inventors: Youngbog YOON, Jaeduk HAN