Patents by Inventor Youngdon Jung

Youngdon Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101687
    Abstract: The present invention relates to a bi-specific antibody that specifically binds to alpha-synuclein and IGF1R, and an use of the bi-specific antibody for the prevention, treatment and/or diagnosis of synucleinopathies associated with alpha-synuclein or alpha-synuclein aggregates, and can allow the alpha-synuclein antibody or an antigen-binding fragment thereof to penetrate the blood brain barrier to exert its action in the brain, and extend the half-life to maintain the efficacy for a long time.
    Type: Application
    Filed: October 3, 2023
    Publication date: March 28, 2024
    Inventors: Jinhyung AHN, Sungwon AN, Dongin KIM, Eunsil SUNG, Jaehyun EOM, Sang Hoon Lee, Weonkyoo YOU, Juhee KIM, Kyungjin PARK, Hyejin CHUNG, Jinwon JUNG, Bora LEE, Byungje SUNG, Yeunju KIM, Yong-Gyu SON, Seawon AHN, Daehae SONG, Jiseon YOO, Youngdon PAK, Donghoon YEOM, Yoseob LEE, Jaeho JUNG
  • Patent number: 9196337
    Abstract: A low sensing current non volatile flip flop includes a first stage to sense a resistance difference between two magnetic tunnel junctions (MTJs) and a second stage having circuitry to amplify the output of the first stage. The output of the first stage is initially pre-charged and determined by the resistance difference of the two MTJs when the sensing operation starts. The first stage does not have a pull-up path to a source voltage (VDD), and therefore does not have a DC path from VDD to ground during the sensing operation. A slow sense enable (SE) signal slope reduces peak sensing current in the first stage. A secondary current path reduces the sensing current duration of the first stage.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: November 24, 2015
    Assignees: QUALCOMM Incorporated, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Seong-Ook Jung, Youngdon Jung, Kyungho Ryu, Jisu Kim, Jung Pill Kim, Seung H. Kang
  • Patent number: 8670266
    Abstract: A flip-flop has an output control node and an isolation switch selectively couples a retention sense node to the output control node. A sense circuit selectively couples an external sense current source to the retention sense node and to magnetic tunneling junction (MTJ) elements. Optionally a write circuit selectively injects a write current through one MTJ element and then another MTJ element. Optionally, a write circuit injects a write current through a first MTJ element concurrently with injecting a write current through a second MTJ element.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: March 11, 2014
    Assignees: QUALCOMM Incorporated, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Seong-Ook Jung, Kyungho Ryu, Youngdon Jung, Jisu Kim, Jung Pill Kim, Seung H. Kang
  • Patent number: 8611132
    Abstract: A resistance based memory sensing circuit has reference current transistors feeding a reference node and a read current transistor feeding a sense node, each transistor has a substrate body at a regular substrate voltage during a stand-by mode and biased during a sensing mode at a body bias voltage lower than the regular substrate voltage. In one option the body bias voltage is determined by a reference voltage on the reference node. The substrate body at the regular substrate voltage causes the transistors to have a regular threshold voltage, and the substrate body at the body bias voltage causes the transistors to have a sense mode threshold voltage, lower than the regular threshold voltage.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: December 17, 2013
    Assignees: QUALCOMM Incorporated, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Seong-Ook Jung, Jisu Kim, Youngdon Jung, Jung Pill Kim, Seung H. Kang
  • Publication number: 20130286721
    Abstract: A low sensing current non volatile flip flop includes a first stage to sense a resistance difference between two magnetic tunnel junctions (MTJs) and a second stage having circuitry to amplify the output of the first stage. The output of the first stage is initially pre-charged and determined by the resistance difference of the two MTJs when the sensing operation starts. The first stage does not have a pull-up path to a source voltage (VDD), and therefore does not have a DC path from VDD to ground during the sensing operation. A slow sense enable (SE) signal slope reduces peak sensing current in the first stage. A secondary current path reduces the sensing current duration of the first stage.
    Type: Application
    Filed: September 13, 2012
    Publication date: October 31, 2013
    Applicants: Industry Academic Cooperation, Yonsei University, QUALCOMM Incorporated
    Inventors: Seong-Ook Jung, Youngdon Jung, Kyungho Ryu, Jisu Kim, Jung Pill Kim, Seung H. Kang
  • Publication number: 20130194862
    Abstract: A flip-flop has an output control node and an isolation switch selectively couples a retention sense node to the output control node. A sense circuit selectively couples an external sense current source to the retention sense node and to magnetic tunneling junction (MTJ) elements. Optionally a write circuit selectively injects a write current through one MTJ element and then another MTJ element. Optionally, a write circuit injects a write current through a first MTJ element concurrently with injecting a write current through a second MTJ element.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Seong-Ook Jung, Kyungho Ryu, Youngdon Jung, Jisu Kim, Jung Pill Kim, Seung H. Kang
  • Publication number: 20120275212
    Abstract: A resistance based memory sensing circuit has reference current transistors feeding a reference node and a read current transistor feeding a sense node, each transistor has a substrate body at a regular substrate voltage during a stand-by mode and biased during a sensing mode at a body bias voltage lower than the regular substrate voltage. In one option the body bias voltage is determined by a reference voltage on the reference node. The substrate body at the regular substrate voltage causes the transistors to have a regular threshold voltage, and the substrate body at the body bias voltage causes the transistors to have a sense mode threshold voltage, lower than the regular threshold voltage.
    Type: Application
    Filed: January 9, 2012
    Publication date: November 1, 2012
    Applicants: Industry-Academic Cooperation Foundation, Yonsei University, QUALCOMM INCORPORATED
    Inventors: Seong-Ook Jung, Jisu Kim, Youngdon Jung, Jung Pill Kim, Seung H. Kang