Patents by Inventor Young Eun Choi
Young Eun Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12329021Abstract: A polarizing plate and a display device including the same are provided. A polarizing plate includes a polarizer comprising an absorption axis and a transmission axis that intersect each other, a first retardation layer disposed on a surface of the polarizer, and a second retardation layer disposed on another surface opposite to the surface of the polarizer. An in-plane retardation value of the second retardation layer is greater than about 20 nm and less than about 100 nm. An angle between the absorption axis of the polarizer and a retardation axis of the second retardation layer is in a range of about 10° to about 45°.Type: GrantFiled: September 25, 2023Date of Patent: June 10, 2025Assignees: SAMSUNG DISPLAY CO., LTD., DONGWOO FINE-CHEM CO., LTD.Inventors: Beong Hun Beon, Min Seok Kim, Duk Jin Lee, Young Eun Choi, Eun Ok Lee, Soo An Cho, Sun Hwa Kim, Ga Hee Park, Yeon Su Woo, Woo Suk Jung
-
Patent number: 12322766Abstract: A battery management system according to the present disclosure includes a swelling detector including at least one sensor configured to detect a swelling status of a battery cell; and a control circuit configured to generate first time-series data of the swelling status repeatedly detected during a charging procedure included in a charge/discharge cycle of the battery cell. The control circuit is configured to determine a first change amount of the swelling status in the charging procedure from the first time-series data. The control circuit is configured to determine whether the battery cell is shorted internally based on the first change amount.Type: GrantFiled: July 8, 2022Date of Patent: June 3, 2025Assignee: LG ENERGY SOLUTION, LTD.Inventors: Ji-Eun Lee, Young-Eun Choi, Eun-Ju Lee
-
Patent number: 12261174Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: GrantFiled: December 16, 2019Date of Patent: March 25, 2025Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim
-
Publication number: 20250061940Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.Type: ApplicationFiled: November 4, 2024Publication date: February 20, 2025Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
-
Patent number: 12165699Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.Type: GrantFiled: April 3, 2020Date of Patent: December 10, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
-
Publication number: 20240341162Abstract: Embodiments of a display device include a plurality of light emitting portions including a plurality of light emitting elements; and a sensing portion including a photoelectric conversion device, wherein the photoelectric conversion device includes a first electrode, common electrode facing the first electrode, and a hole injection layer, hole transport layer, resonance layer, and an active layer stacked between the first electrode and the common electrode, and wherein the light emitting elements include, a pixel electrode, the common electrode facing the pixel electrode, and the hole injection layer, hole transport layer, resonance layer, and a light emitting layer stacked between the pixel electrode and the common electrode, wherein a thickness of each of the resonance layers of light emitting elements are different from each other, and a thickness of the resonance layer of a light emitting element is the same as a thickness of the resonance layer.Type: ApplicationFiled: November 20, 2023Publication date: October 10, 2024Inventors: JUN YONG SHIN, SOUNG WOOK KIM, HWA SOOK RYU, DONG KYU SEO, SEOK GYU YOON, DAE HO LEE, HYE JIN JUNG, YOUNG EUN CHOI
-
Publication number: 20240327399Abstract: Disclosed herein are compounds of Formula (I): that inhibit DNA Polymerase Theta (Pol?) activity, in particular inhibit Pol? activity by inhibiting ATP dependent helicase domain activity of Pol?. Also, disclosed are pharmaceutical compositions comprising such compounds and methods of treating and/or preventing diseases treatable by inhibition of Pol? such as cancer, including homologous recombination (HR) deficient cancers.Type: ApplicationFiled: May 10, 2024Publication date: October 3, 2024Inventors: Janos BOTYANSZKI, Kevin Duffy, Young Eun Choi, Claire L. Neilan, Marcus M. Fischer
-
Publication number: 20240284770Abstract: A polarizing plate and a display device including the same are provided. A polarizing plate includes a polarizer comprising an absorption axis and a transmission axis that intersect each other, a first retardation layer disposed on a surface of the polarizer, and a second retardation layer disposed on another surface opposite to the surface of the polarizer. An in-plane retardation value of the second retardation layer is greater than about 20 nm and less than about 100 nm. An angle between the absorption axis of the polarizer and a retardation axis of the second retardation layer is in a range of about 10° to about 45°.Type: ApplicationFiled: September 25, 2023Publication date: August 22, 2024Applicants: Samsung Display Co., LTD., DONGWOO FINE-CHEM CO., LTD.Inventors: Beong Hun BEON, Min Seok KIM, Duk Jin LEE, Young Eun CHOI, Eun Ok LEE, Soo An CHO, Sun Hwa KIM, Ga Hee PARK, Yeon Su WOO, Woo Suk JUNG
-
Publication number: 20240274804Abstract: A negative electrode including: a current collector; a first negative electrode active material layer positioned on at least one surface of the current collector for a negative electrode and containing a first carbonaceous active material; and a second negative electrode active material layer positioned on a surface of the first negative electrode active material layer and containing a silicon-based active material and carbon nanotubes. A lithium secondary battery including the negative electrode is also disclosed.Type: ApplicationFiled: April 23, 2024Publication date: August 15, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Hyun-Min KIM, Min-Kyung KIM, Jong-Heon SEOL, Ki-Won SUNG, Myung-Ki LEE, Eun-Ju LEE, Young-Eun CHOI
-
Patent number: 12044742Abstract: A battery management system includes a displacement sensor configured to detect a displacement of a cell group including a plurality of battery cells connected in parallel, and a control unit. The control unit is configured to record the displacement of the cell group at a predetermined time interval for a first diagnosis period from a first time point to a second time point during charging of the cell group. The control unit is configured to determine a first displacement curve from a history of the displacement over the first diagnosis period. The control unit is configured to determine whether the plurality of battery cells is nonuniformly degraded based on the first displacement curve.Type: GrantFiled: November 13, 2020Date of Patent: July 23, 2024Assignee: LG Energy Solution, Ltd.Inventors: Young-Eun Choi, Hyo-Jung Yoon, Hyun-Min Kim, Eun-Ju Lee
-
Patent number: 12002949Abstract: A negative electrode including: a current collector; a first negative electrode active material layer positioned on at least one surface of the current collector for a negative electrode and containing a first carbonaceous active material; and a second negative electrode active material layer positioned on a surface of the first negative electrode active material layer and containing a silicon-based active material and carbon nanotubes. A lithium secondary battery including the negative electrode is also disclosed.Type: GrantFiled: November 30, 2018Date of Patent: June 4, 2024Assignee: LG ENERGY SOLUTION, LTD.Inventors: Hyun-Min Kim, Min-Kyung Kim, Jong-Heon Seol, Ki-Won Sung, Myung-Ki Lee, Eun-Ju Lee, Young-Eun Choi
-
Publication number: 20240162230Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: ApplicationFiled: January 12, 2024Publication date: May 16, 2024Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim, Jiwon Chang
-
Patent number: 11908863Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: GrantFiled: December 16, 2019Date of Patent: February 20, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim, Jiwon Chang
-
Publication number: 20240030571Abstract: A method for reinjecting an electrolyte, and a secondary battery capable of being reinjected with an electrolyte are described. The method for reinjecting an electrolyte is a method for reinjecting an electrolyte into a secondary battery in which an electrode assembly and an electrolyte are accommodated in a pouch. The pouch includes an aluminum sheet, in which a functional hole is formed, and a polymer layer stacked on the aluminum sheet. The method includes a reinjection process of injecting an additional electrolyte into the pouch through the functional hole by opening the functional hole, and a sealing process of sealing the functional hole after the reinjection process.Type: ApplicationFiled: December 22, 2021Publication date: January 25, 2024Applicant: LG Energy Solution, Ltd.Inventors: Ji Eun Lee, Eun Ju Lee, Young Eun Choi
-
Publication number: 20230369660Abstract: A battery management system according to the present disclosure includes a swelling detector including at least one sensor configured to detect a swelling status of a battery cell; and a control circuit configured to generate first time-series data of the swelling status repeatedly detected during a charging procedure included in a charge/discharge cycle of the battery cell. The control circuit is configured to determine a first change amount of the swelling status in the charging procedure from the first time-series data. The control circuit is configured to determine whether the battery cell is shorted internally based on the first change amount.Type: ApplicationFiled: July 8, 2022Publication date: November 16, 2023Applicant: LG ENERGY SOLUTION, LTD.Inventors: Ji-Eun LEE, Young-Eun CHOI, Eun-Ju LEE
-
Patent number: 11727988Abstract: According to an embodiment of the present disclosure, a memory device for a logic-in-memory may include a cell array including a plurality of ternary memory cells, a row decoder configured to select at least one ternary memory cell from among the plurality of ternary memory cells, and a page buffer configured to provide a first value to the at least one ternary memory cell and latch a third value obtained by performing a logic operation on the first value and a second value stored in the at least one ternary memory cell and/or the second value.Type: GrantFiled: April 3, 2020Date of Patent: August 15, 2023Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
-
Publication number: 20220252676Abstract: A battery management system includes a displacement sensor configured to detect a displacement of a cell group including a plurality of battery cells connected in parallel, and a control unit. The control unit is configured to record the displacement of the cell group at a predetermined time interval for a first diagnosis period from a first time point to a second time point during charging of the cell group. The control unit is configured to determine a first displacement curve from a history of the displacement over the first diagnosis period. The control unit is configured to determine whether the plurality of battery cells is nonuniformly degraded based on the first displacement curve.Type: ApplicationFiled: November 13, 2020Publication date: August 11, 2022Applicant: LG Energy Solution, Ltd.Inventors: Young-Eun Choi, Hyo-Jung Yoon, Hyun-Min Kim, Eun-Ju Lee
-
Publication number: 20220085155Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region in the substrate, spaced apart from the source region in a direction parallel to a top surface of the substrate, a gate electrode provided on the substrate and between the source region and the drain region, a gate insulating film interposed between the gate electrode and the substrate, and a constant current generating layer extending between the source region and the drain region, in the direction parallel to the top surface of the substrate, wherein the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: ApplicationFiled: December 16, 2019Publication date: March 17, 2022Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim
-
Publication number: 20220085015Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: ApplicationFiled: December 16, 2019Publication date: March 17, 2022Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim, Jiwon Chang
-
Publication number: 20220085017Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: ApplicationFiled: December 16, 2019Publication date: March 17, 2022Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim