Patents by Inventor Youngin GOH

Youngin GOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12268008
    Abstract: Disclosed are a 3D non-volatile memory, an operating method thereof, and a manufacturing method thereof. The 3D non-volatile memory includes a bit line formed to extend in a vertical direction and horizontal structures contacting the bit line while being formed to extend in a horizontal direction and being space in the vertical direction. Each of the horizontal structures includes a ferroelectric layer contacting the bit line, a middle metal layer surrounded by the ferroelectric layer, a dielectric layer surrounded by the middle metal layer, and a word line surrounded by the dielectric layer.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: April 1, 2025
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sanghun Jeon, Youngin Goh
  • Publication number: 20250107100
    Abstract: A semiconductor memory device includes: a device isolation pattern in a semiconductor substrate and defining an active pattern extending in a first direction; a bit line crossing the active pattern on the semiconductor substrate and extending in a second direction forming an acute angle with the first direction; a word line extending across the active pattern in a third direction intersecting the second direction and extending into the semiconductor substrate; electrode plates vertically stacked on the bit line; a common electrode pattern extending through the electrode plates to the active pattern on one side of the bit line; and a ferroelectric pattern between the common electrode pattern and the electrode plates. The bit line is in contact with an upper surface of the active pattern and an upper surface of the device isolation pattern.
    Type: Application
    Filed: April 18, 2024
    Publication date: March 27, 2025
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: JEON IL LEE, YOUNGIN GOH
  • Publication number: 20240324234
    Abstract: A 3D FeRAM is provided. The 3D FeRAM includes a semiconductor patterns stacked in a vertical direction on a substrate and spaced apart from each other in a first horizontal direction, bit lines on first side surface of the semiconductor patterns, extending in the first horizontal direction, and spaced apart from each other in the vertical direction, first electrodes on second side surfaces of the semiconductor patterns and spaced apart from each other in both the vertical direction and the first horizontal direction, a ferroelectric layer on the first electrodes, second electrodes on the ferroelectric layers, extending in the first horizontal direction, and spaced apart from each other in the vertical direction, and word lines between two adjacent semiconductor patterns extending in the vertical direction.
    Type: Application
    Filed: February 1, 2024
    Publication date: September 26, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeonil Lee, Kyunghwan Lee, Youngin Goh, Yukio Hayakawa
  • Patent number: 11729992
    Abstract: Provided is a nonvolatile memory device including a lower electrode on a substrate, an upper electrode on the lower electrode, a tunnel barrier pattern between the lower electrode and the upper electrode, and a fixed charge pattern in contact with the lower electrode and spaced apart from the tunnel barrier pattern with the lower electrode therebetween. The tunnel barrier pattern includes an anti-ferroelectric material. The lower electrode includes a first material. The upper electrode includes a second material. The first material and the second material have different work functions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: August 15, 2023
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sanghun Jeon, Youngin Goh
  • Publication number: 20230051142
    Abstract: Disclosed are a 3D non-volatile memory, an operating method thereof, and a manufacturing method thereof. The 3D non-volatile memory includes a bit line formed to extend in a vertical direction and horizontal structures contacting the bit line while being formed to extend in a horizontal direction and being space in the vertical direction. Each of the horizontal structures includes a ferroelectric layer contacting the bit line, a middle metal layer surrounded by the ferroelectric layer, a dielectric layer surrounded by the middle metal layer, and a word line surrounded by the dielectric layer.
    Type: Application
    Filed: May 12, 2022
    Publication date: February 16, 2023
    Inventors: Sanghun JEON, Youngin GOH
  • Publication number: 20220352187
    Abstract: Provided is a nonvolatile memory device including a lower electrode on a substrate, an upper electrode on the lower electrode, a tunnel barrier pattern between the lower electrode and the upper electrode, and a fixed charge pattern in contact with the lower electrode and spaced apart from the tunnel barrier pattern with the lower electrode therebetween. The tunnel barrier pattern includes an anti-ferroelectric material. The lower electrode includes a first material. The upper electrode includes a second material. The first material and the second material have different work functions.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 3, 2022
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sanghun JEON, Youngin GOH
  • Publication number: 20220336673
    Abstract: Disclosed is an oxide electrode for a device including a top electrode, a bottom electrode, and a polarizable material layer interposed between the top electrode and the bottom electrode. An oxide electrode is used as the bottom electrode unlike the top electrode.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 20, 2022
    Inventors: Sanghun JEON, Youngin GOH