Abstract: An organic light emitting diode display includes a driving transistor and a compensation transistor. The driving transistor includes a first gate electrode disposed on a substrate, a polycrystalline semiconductor layer disposed on the first gate electrode of the driving transistor and including a first electrode, a second electrode, and a channel, and a second gate electrode disposed on the polycrystalline semiconductor layer of the driving transistor. The compensation transistor includes a polycrystalline semiconductor layer including a first electrode, a second electrode, and a channel, and a gate electrode disposed on the polycrystalline semiconductor layer of the compensation transistor.

Abstract: A pixel circuit is disclosed that includes a first hold capacitor or a second hold capacitor or both the first and second hold capacitors. The first hold capacitor is connected to a first gate electrode of a first transistor and an intermediate node of a first sub-transistor and a second sub-transistor. The second hold capacitor is connected to the first gate electrode of the first transistor and an intermediate node of a third sub-transistor and a fourth sub-transistor.

Abstract: Provided are a pixel circuit and a display device having the pixel circuit. The pixel circuit includes an organic light emitting diode, a switching transistor, a storage capacitor, and a driving transistor. The switching transistor is turned off when a scan signal has a first voltage and turned on when the scan signal has a second voltage. The storage capacitor stores a data voltage when the switching transistor is turned on in response to the scan signal. The driving transistor is electrically connected with the organic light emitting diode between a high power supply voltage and a low power supply voltage to provide a driving current to the organic light emitting diode, and includes a first bottom gate electrode that is provided with the first voltage. The driving current corresponds to the data voltage stored in the storage capacitor.

Abstract: Disclosed is an elastic neutral ankle-foot orthosis including: a forefoot immobilizer formed of rubber to cover a front of a foot; an elastic band connected to one end of the forefoot immobilizer; a calf band worn to be wrapped around the calf and having the elastic band attached thereto; and a knee retention band worn to be wrapped around a knee and having a top of the elastic band to be pulled and secured thereto.

Abstract: Provided are a pixel circuit and a display device having the pixel circuit. The pixel circuit includes an organic light emitting diode, a switching transistor, a storage capacitor, and a driving transistor. The switching transistor is turned off when a scan signal has a first voltage and turned on when the scan signal has a second voltage. The storage capacitor stores a data voltage when the switching transistor is turned on in response to the scan signal. The driving transistor is electrically connected with the organic light emitting diode between a high power supply voltage and a low power supply voltage to provide a driving current to the organic light emitting diode, and includes a first bottom gate electrode that is provided with the first voltage. The driving current corresponds to the data voltage stored in the storage capacitor.

Abstract: An organic light emitting diode display includes a driving transistor and a compensation transistor. The driving transistor includes a first gate electrode disposed on a substrate, a polycrystalline semiconductor layer disposed on the first gate electrode of the driving transistor and including a first electrode, a second electrode, and a channel, and a second gate electrode disposed on the polycrystalline semiconductor layer of the driving transistor. The compensation transistor includes a polycrystalline semiconductor layer including a first electrode, a second electrode, and a channel, and a gate electrode disposed on the polycrystalline semiconductor layer of the compensation transistor.

Abstract: A display device may include a first pixel coupled to an emission control line, and an emission control stage for selectively coupling the emission control line to a first or second supply voltage line. The emission control stage may include: a first emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the emission control line, and a main gate electrode coupled to a first node; a second emission control transistor including a first electrode coupled to the emission control line, a second electrode coupled to the second supply voltage line, and a main gate electrode coupled to a second node; and a third emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the first node, a main gate electrode coupled to the second node, and a sub-gate electrode.

Abstract: A pixel includes: an organic light emitting diode; a first transistor including a gate that is connected to a first node, wherein the first transistor is connected between a second node and a third node; a second transistor including a gate that is connected to a corresponding scan line, wherein the second transistor is connected between a data line and the second node; a storage capacitor connected between the first node and a first voltage; a third transistor including a gate that is connected to the corresponding scan line, the third transistor is connected between the first node and the third node; and a fourth transistor connected between a first end of the first transistor and a second voltage.

Abstract: An organic light emitting diode display includes a first transistor disposed on a substrate and including a gate electrode, an input electrode, and an output electrode, a second transistor electrically connected to a scan line, a data line, and the input electrode of the first transistor, a third transistor including a gate electrode, a first electrode electrically connected to the output electrode of the first transistor, and a second electrode electrically connected to the gate electrode of the first transistor, and an overlapping layer that overlaps the gate electrode of the third transistor in a plan view. The overlapping layer is disposed between the substrate and a semiconductor layer of the third transistor.

Abstract: A display device is provided. The display device includes a first substrate, a first charge trap layer disposed on the first substrate and including silicon nitride, a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor, and an organic light emitting element electrically connected to the first transistor, wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5.

Abstract: A display device may include a first pixel coupled to an emission control line, and an emission control stage for selectively coupling the emission control line to a first or second supply voltage line. The emission control stage may include: a first emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the emission control line, and a main gate electrode coupled to a first node; a second emission control transistor including a first electrode coupled to the emission control line, a second electrode coupled to the second supply voltage line, and a main gate electrode coupled to a second node; and a third emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the first node, a main gate electrode coupled to the second node, and a sub-gate electrode.

Abstract: An organic light emitting diode display includes a first transistor disposed on a substrate and including a gate electrode, an input electrode, and an output electrode, a second transistor electrically connected to a scan line, a data line, and the input electrode of the first transistor, a third transistor including a gate electrode, a first electrode electrically connected to the output electrode of the first transistor, and a second electrode electrically connected to the gate electrode of the first transistor, and an overlapping layer that overlaps the gate electrode of the third transistor in a plan view. The overlapping layer is disposed between the substrate and a semiconductor layer of the third transistor.

Abstract: A pixel circuit is disclosed that includes a first hold capacitor or a second hold capacitor or both the first and second hold capacitors. The first hold capacitor is connected to a first gate electrode of a first transistor and an intermediate node of a first sub-transistor and a second sub-transistor. The second hold capacitor is connected to the first gate electrode of the first transistor and an intermediate node of a third sub-transistor and a fourth sub-transistor.

Abstract: A display device includes a light-emitting element, a driving element to apply a driving current, a 1-1 switching element including a first electrode connected to a gate electrode of the driving element, a gate electrode, and a second electrode connected to a first intermediate node, a 1-2 switching element including a first electrode connected to the first intermediate node, a gate electrode, and a second electrode connected to a second electrode of the driving element, a 2-1 switching element including a first electrode connected to a second intermediate node, a gate electrode, and a second electrode connected to the gate electrode of the driving element, a 2-2 switching element including a first electrode, a gate electrode, and a second electrode connected to the second intermediate node, and a capacitor including a first electrode to receive a power voltage, and a second electrode connected to the first and second intermediate nodes.

Abstract: A display device includes: a display panel including a first pixel, a second pixel adjacent to one side of the first pixel, and a third pixel adjacent to the other side of the first pixel; a first scan driver supplying a first signal to the first to third pixels through a first scan line; a second scan driver supplying a second scan signal to the second and third pixels through a second scan line when a first time elapses after the supply of the first scan signal is started; a data driver supplying a data voltage to a plurality of output lines; and a data divider selectively supplying the data voltage to data lines respectively coupled to the first to third pixels. Each of the second and third pixels includes a switching transistor controlled by the second scan signal.

Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.

Abstract: A display device and a method of manufacturing the same are provided. The display device, comprises a first base substrate, a first barrier layer disposed on the first base substrate, a second base substrate disposed on the first barrier layer, at least one transistor disposed on the second base substrate, and an organic light emitting diode disposed on the at least one transistor, wherein the first barrier layer includes a silicon oxide, and has an adhesion force of 200 gf/inch or more to the second base substrate.

Abstract: A display panel includes a first organic film layer, a first barrier layer disposed on first organic film layer, a shielding pattern disposed on the first barrier layer, a second barrier layer covering the shielding pattern and disposed on first barrier layer, a first active pattern disposed on the second barrier layer and overlapping the shielding pattern in a plan view, a gate electrode disposed on the first active pattern, an emission control line disposed on the first active pattern and adjacent to a first side of the gate electrode in the plan view, an upper compensation control line disposed on the emission control line and adjacent to a second side of gate electrode in the plan view, and a second active pattern disposed on the emission control line.

Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.

Abstract: A display panel includes a first organic film layer, a first barrier layer disposed on first organic film layer, a shielding pattern disposed on the first barrier layer, a second barrier layer covering the shielding pattern and disposed on first barrier layer, a first active pattern disposed on the second barrier layer and overlapping the shielding pattern in a plan view, a gate electrode disposed on the first active pattern, an emission control line disposed on the first active pattern and adjacent to a first side of the gate electrode in the plan view, an upper compensation control line disposed on the emission control line and adjacent to a second side of gate electrode in the plan view, and a second active pattern disposed on the emission control line.