Abstract: Provided are an organic light-emitting diode (OLED) display and method of driving the same. An OLED display includes: a display panel including a plurality of pixels, each pixel including an OLED, an emission timing of each pixel being controlled in response to an EM signal, a shift register configured to generate an anti-phase EM signal based on gate shift clocks, and an inverter configured to: invert a phase of the anti-phase EM signal based on emission shift clocks, and generate the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are lower in a low-speed driving mode than in a normal driving mode, and wherein in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks.

Abstract: An organic light emitting display device and a driving method thereof are provided. The organic light emitting display device comprising a display panel including a plurality of pixels, each pixel including an organic light emitting element, a data driver supplying a data signal to the organic light emitting element through a data line, a gate driver supplying a gate signal to the organic light emitting element through a gate line, and a timing controller controlling an operation timing of the data driver and an operation timing of the gate driver, and generating a conversion control signal controlling a conversion timing of a refresh rate of the display panel in response to an external input signal of the display panel.

Abstract: A display panel and an electroluminescence display using the same are discussed. The display panel includes pixels in which data lines and gate lines are crossed and which are arranged in a matrix form, and a gate driver configured to supply a gate pulse to the gate lines. Each pixel circuit of the pixels includes one or more n-type transistors and two or more p-type transistors. A gate driver of the display panel includes a first gate driving circuit configured to supply a first gate signal to an n-type transistor of the pixel circuit using a plurality of n-type transistors, a second gate driving circuit configured to supply a second gate signal to one of the p-type transistors of the pixel circuit using a plurality of p-type transistors, and a third gate driving circuit configured to supply a third gate signal to the other one of the p-type transistors of the pixel circuit using a plurality of n-type transistors.

Abstract: A pixel of an organic light emitting display device includes a driving thin film transistor (TFT) on a substrate, a switching TFT on the substrate, and an organic light emitting diode (OLED) on the substrate. The driving TFT includes a first active layer including poly-Si, a first insulation layer on the first active layer, and a first source electrode and a first drain electrode contacting the first active layer. At least a portion of the first source electrode and at least a portion of the first drain electrode are disposed on different layers. The switching TFT is electrically connected to the driving TFT, and the switching TFT includes a second active layer including oxide semiconductor material. The OLED is electrically connected to the driving TFT.

Abstract: A thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same are discussed. The thin film transistor substrate can include a substrate, a first thin film transistor (TFT), a second TFT, a first storage capacitor electrode, an oxide layer, a nitride layer, a second storage capacitor electrode, a planar layer and a pixel electrode. The first TFT is disposed in a first area, the second TFT is disposed in a second area, and the first storage capacitor electrode is disposed in a third area on the substrate respectively. The oxide layer covers the first and second TFTs, and exposes the first storage capacitor electrode. The nitride layer is disposed on the oxide layer and covers the first storage capacitor electrode. The second storage capacitor electrode overlaps with the first storage capacitor electrode on the nitride layer. The planar layer covers the first and second TFTs, and the second storage capacitor electrode.

Abstract: Provided are a thin film transistor substrate and a display using the same. A display includes: a first thin film transistor, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer.

Abstract: A thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same are discussed. The thin film transistor substrate can include a substrate, a first thin film transistor (TFT), a second TFT, a first storage capacitor electrode, an oxide layer, a nitride layer, a second storage capacitor electrode, a planar layer and a pixel electrode. The first TFT is disposed in a first area, the second TFT is disposed in a second area, and the first storage capacitor electrode is disposed in a third area on the substrate respectively. The oxide layer covers the first and second TFTs, and exposes the first storage capacitor electrode. The nitride layer is disposed on the oxide layer and covers the first storage capacitor electrode. The second storage capacitor electrode overlaps with the first storage capacitor electrode on the nitride layer. The planar layer covers the first and second TFTs,and the second storage capacitor electrode.

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same. A display includes a first thin film transistor including a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract: A display device includes a display panel including gate lines and data lines, the gate lines and the data lines intersecting, and pixels defined at the intersections of the gate lines and data lines, a gate driver to sequentially output a gate driving signal to the gate lines, a data driver to sequentially output a data signal to channels, a switching controller to electrically connect one of the channels with two or more of the data lines, the switching controller including a switch for each of the channels, wherein the two or more data lines are adjacent, one is directly connected to the channel and the other is connected to the channel through the switch, and a timing controller to provide a selection signal to the switch which controls the connection between the other of the two or more data lines and the channel.

Abstract: Provided are an organic light-emitting diode (OLED) display and method of driving the same. An OLED display includes: a display panel including a plurality of pixels, each pixel including an OLED, an emission timing of each pixel being controlled in response to an EM signal, a shift register configured to generate an anti-phase EM signal based on gate shift clocks, and an inverter configured to: invert a phase of the anti-phase EM signal based on emission shift clocks, and generate the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are lower in a low-speed driving mode than in a normal driving mode, and wherein in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks.

Abstract: Provided are a display device and method of driving the same. A display device includes: a display panel including: data lines and gate lines intersecting each other, and pixels in a matrix, a timing controller configured to reduce a refresh rate of the pixels in a low-speed driving mode compared to a refresh rate of the pixels in a normal driving mode, and a display panel driving circuit configured to: write data to the display panel, write data to the pixels during N driving frame periods within a unit of time, that is set to the refresh rate of the low-speed driving mode, under the control of the timing controller, where “N” is a positive integer of 2 to 4, wherein the pixels are configured to hold a voltage of previous data for a remaining time other than the N driving frame periods of the unit of time.

Abstract: Provided are a display device and method of driving the same. A display device includes: a display panel including: intersecting data lines and gate lines, and pixels in a matrix, a timing controller allowing the pixels to be driven at a lower refresh rate in low-speed driving mode than in normal driving mode, and controlling a horizontal blank time to be longer in the low-speed driving mode than the normal driving mode, the horizontal blank time being a period of time during which no data voltage exists, between an nth data voltage and an (n+1)th data voltage consecutively supplied through the data lines, “n” being a positive integer, and a display panel driving circuit writing one frame of image data to the pixels during one frame period in the normal driving mode, and in a distributed manner during a second to fourth frame period in the low-speed driving mode.

Abstract: An organic light-emitting diode display can include an improved aperture ratio by configuring a circuit pattern between neighboring subpixels in a symmetrical fashion such that the subpixels share signal lines. Each pixel of the organic light-emitting diode display is formed in a symmetrical fashion with respect to one contact area, the number of reference connecting patterns can be reduced and therefore the area occupied by an opening area for each pixel can be made wider, thus leading to an improved aperture ratio.

Abstract: A display device including a first substrate. The first substrate including an active region and a dummy region formed in an outer edge of the active region, the active region including a plurality of pixel regions and being configured to implement an actual image, the dummy region including a gate in panel (GIP) circuit, control signal lines, a ground, and common lines. The GIP circuit is overlapped by at least a part of the control signal lines, the ground, and the common lines with an insulating layer interposed therebetween. The display device further includes a thin film transistor (TFT) for a shift register is provided in each of a plurality of stages of the GIP circuit; and a source contact hole and a gate contact hole of each TFT for the shift registers, the source contact hole and the gate contact hole being formed along a corresponding control signal line.

Abstract: A liquid crystal display (LCD) device includes: a dummy region on which a gate driver is mounted; an active region including a plurality of pixel regions to implement an actual image; and first and second lines disposed in the dummy region, wherein the first line is formed on a substrate and the second line is formed on an insulating layer such that portions of the first and second lines overlap with the insulating layer interposed therebetween.

Abstract: Provided are a thin film transistor substrate and a display using the same. A display includes: a first thin film transistor, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer.

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Abstract: Provided are a thin film transistor substrate and a display using the same. A display includes: a first area, a second area, a first thin film transistor disposed at the first area, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed at the second area, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, a nitride layer on an area of the display device, other than the second area, the nitride layer covering the first gate electrode, and an oxide layer disposed over the first gate electrode and the second gate electrode.

Abstract: Provided are a thin film transistor substrate and a display using the same. A thin film transistor substrate includes: a substrate, a first thin film transistor disposed at a first area of the substrate, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed at a second area of the substrate, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, a nitride layer disposed on an area of the substrate, other than the second area, the nitride layer covering the first gate electrode, and an oxide layer disposed: over the first gate electrode and the second gate electrode, and under the oxide semiconductor layer.

Abstract: Provided are a thin film transistor substrate and a display using the same. A thin film transistor substrate includes: a substrate, a first thin film transistor disposed on the substrate, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor disposed on the substrate, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer.