Abstract: The present invention relates to an electronic device having a metal case, the electronic device comprising: a metal case having at least one electronic circuit or antenna formed therein; a metal pad arranged at the metal case and electrically connected to the at least one electronic circuit or antenna; a metal sheet attached to one surface of the metal pad; and an electronic circuit board electrically connected to the at least one electronic circuit or antenna of the metal case through a metal instrument for connection which detachably contacts the metal sheet.

Abstract: The present invention relates to an electronic device having a metal case, the electronic device comprising: a metal case having at least one electronic circuit or antenna formed therein; a metal pad arranged at the metal case and electrically connected to the at least one electronic circuit or antenna; a metal sheet attached to one surface of the metal pad; and an electronic circuit board electrically connected to the at least one electronic circuit or antenna of the metal case through a metal instrument for connection which detachably contacts the metal sheet.

Abstract: A test unit usable with a board having, an electronic component includes at least one testing point provided in each electronic component to test electric properties and a connection state of the plurality of electronic components connected to the board. The test unit usable with a PCB having the electronic component includes a testing point formed on the electronic component, thereby an enhancing high integration of the board.

Abstract: A test unit to test a board having an area array package mounted therein includes the board, the area array package having an electronic component, a plurality of package pins including a plurality of contact pins connected with the electronic component and a plurality of no-contact pins not connected with the electronic component, and a plurality of contact members respectively provided on the plurality of contact pins and the plurality of no-contact pins to connect the plurality of package pins with the board, a plurality of board contact parts provided on the board and connected with the plurality of contact members to be connected with the plurality of package pins, at least one first connection part provided in the area array package to electrically connect the plurality of no-contact pins with each other in pairs, at least one second connection part provided on the board to electrically connect the plurality of board contact parts with each other in pairs to form a circuit line arranged alternately with

Abstract: A board assembly apparatus and a manufacturing method includes applying solder paste onto a first surface of a first board, arranging electronic components on the first surface of the first board on which the solder paste is applied, arranging a second board above the electronic components and the first surface of the first board, and curing the solder paste.

Abstract: A test unit usable with a board having, an electronic component includes at least one testing point provided in each electronic component to test electric properties and a connection state of the plurality of electronic components connected to the board. The test unit usable with a PCB having the electronic component includes a testing point formed on the electronic component, thereby an enhancing high integration of the board.

Abstract: A test unit to test a board having an area array package mounted therein includes the board, the area array package having an electronic component, a plurality of package pins including a plurality of contact pins connected with the electronic component and a plurality of no-contact pins not connected with the electronic component, and a plurality of contact members respectively provided on the plurality of contact pins and the plurality of no-contact pins to connect the plurality of package pins with the board, a plurality of board contact parts provided on the board and connected with the plurality of contact members to be connected with the plurality of package pins, at least one first connection part provided in the area array package to electrically connect the plurality of no-contact pins with each other in pairs, at least one second connection part provided on the board to electrically connect the plurality of board contact parts with each other in pairs to form a circuit line arranged alternately with

Abstract: A method of fabricating and mounting a flip chip includes using an environmentally friendly plasma gas, which minimizes safety hazards during an implementation of the method and does not require an additional heat source during a reflow process thereof. That is, the method includes reflowing a solder bump using an argon-hydrogen plasma process. The argon-hydrogen plasma process used to fabricate the flip chip includes maintaining a pressure in a chamber at 250 to 270 mtorr, feeding a mixed gas of argon with 10 to 20% hydrogen to the chamber to generate a plasma with power of 100 to 200 W, and exposing the flip chip to the plasma for 30 to 120 seconds. Additionally, an argon-hydrogen plasma process used to mount the flip chip includes maintaining pressure in a chamber at 100 to 400 mtorr, feeding a mixed gas of argon with 0 to 20% hydrogen to the chamber to generate a plasma with power of 10 to 50 W, and exposing the flip chip to the plasma for 10 to 120 seconds.

Abstract: A method of fabricating and mounting a flip chip includes using an environmentally friendly plasma gas, which minimizes safety hazards during an implementation of the method and does not require an additional heat source during a reflow process thereof. That is, the method includes reflowing a solder bump using an argon-hydrogen plasma process. The argon-hydrogen plasma process used to fabricate the flip chip includes maintaining a pressure in a chamber at 250 to 270 mtorr, feeding a mixed gas of argon with 10 to 20% hydrogen to the chamber to generate a plasma with power of 100 to 200 W, and exposing the flip chip to the plasma for 30 to 120 seconds. Additionally, an argon-hydrogen plasma process used to mount the flip chip includes maintaining pressure in a chamber at 100 to 400 mtorr, feeding a mixed gas of argon with 0 to 20% hydrogen to the chamber to generate a plasma with power of 10 to 50 W, and exposing the flip chip to the plasma for 10 to 120 seconds.